Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12061669 | Manufacturing data analyzing method and manufacturing data analyzing device | Ching-Pei Lin, Ming-Tsung Yeh, Chuan-Guei WANG | 2024-08-13 |
| 11955309 | Automatic adjustment method and automatic adjustment device of beam of semiconductor apparatus, and training method of parameter adjustment model | Zheng Li, Chian-Chen Kuo, Yi-Cheng Lu | 2024-04-09 |
| 11916075 | Integrated circuit structure with semiconductor devices and method of fabricating the same | Wei-Lun Hsu, Yung-Chien Kung, Ming-Tsung Yeh, Yan Liu, Am-Tay Luy +1 more | 2024-02-27 |
| 11609836 | Operation method and operation device of failure detection and classification model | Ching-Pei Lin, Te-Hsuan Chen, Yi-Lin HUNG | 2023-03-21 |
| 11417654 | Integrated circuit structure with semiconductor devices and method of fabricating the same | Wei-Lun Hsu, Yung-Chien Kung, Ming-Tsung Yeh, Yan Liu, Am-Tay Luy +1 more | 2022-08-16 |
| 11119625 | Remote control device for manufacturing equipment and method for detecting manual control | Zheng Li, Chung-Jung Chen, Chun-Man Li, Li Yang, Ching-Pei Lin | 2021-09-14 |
| 10784261 | Integrated circuit structure with semiconductor devices and method of fabricating the same | Wei-Lun Hsu, Yung-Chien Kung, Ming-Tsung Yeh, Yan Liu, Am-Tay Luy +1 more | 2020-09-22 |
| 10570507 | Apparatus and method for controlling operation of machine | Neng-Hsing Shen, Chien-Wen Yang, Chun-Man Li, Ching-Pei Lin | 2020-02-25 |
| 10529715 | Integrated circuit structure with semiconductor devices and method of fabricating the same | Wei-Lun Hsu, Yung-Chien Kung, Ming-Tsung Yeh, Yan Liu, Am-Tay Luy +1 more | 2020-01-07 |
| 9958494 | Hierarchical wafer lifetime prediction method | Hsin-Ming Hou | 2018-05-01 |
| 9443970 | Semiconductor device with epitaxial structures and method for fabricating the same | Hsin-Ming Hou, Yu-Cheng Tung, Wai-Yi Lien, Ming-Tsung Chen | 2016-09-13 |
| 9299624 | Stacked semiconductor structure and manufacturing method for the same | Hsin-Ming Hou | 2016-03-29 |
| 9202914 | Semiconductor device and method for fabricating the same | Hsin-Ming Hou, Yu-Cheng Tung, Wai-Yi Lien, Ming-Tsung Chen | 2015-12-01 |
| 9159809 | Multi-gate transistor device | Hsin-Ming Hou | 2015-10-13 |
| 9129076 | Hierarchical wafer yield prediction method and hierarchical lifetime prediction method | Hsin-Ming Hou | 2015-09-08 |
| 9024407 | Monitoring testkey used in semiconductor fabrication | Chin-Chun Huang, Wei-Po Chiu, Nick Chao | 2015-05-05 |
| 8965550 | Experiments method for predicting wafer fabrication outcome | Hsin-Ming Hou | 2015-02-24 |
| 8930865 | Layout correcting method and layout correcting system | Hsin-Ming Hou | 2015-01-06 |
| 8643397 | Transistor array for testing | Hsin-Ming Hou | 2014-02-04 |
| 8434030 | Integrated circuit design and fabrication method by way of detecting and scoring hotspots | Hsin-Ming Hou | 2013-04-30 |
| 7320907 | Method for controlling lattice defects at junction and method for forming LDD or S/D regions of CMOS device | Ping-Pang Hsieh | 2008-01-22 |