Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9958494 | Hierarchical wafer lifetime prediction method | Ji-Fu Kung | 2018-05-01 |
| 9443970 | Semiconductor device with epitaxial structures and method for fabricating the same | Yu-Cheng Tung, Ji-Fu Kung, Wai-Yi Lien, Ming-Tsung Chen | 2016-09-13 |
| 9299624 | Stacked semiconductor structure and manufacturing method for the same | Ji-Fu Kung | 2016-03-29 |
| 9202914 | Semiconductor device and method for fabricating the same | Yu-Cheng Tung, Ji-Fu Kung, Wai-Yi Lien, Ming-Tsung Chen | 2015-12-01 |
| 9159809 | Multi-gate transistor device | Ji-Fu Kung | 2015-10-13 |
| 9129076 | Hierarchical wafer yield prediction method and hierarchical lifetime prediction method | Ji-Fu Kung | 2015-09-08 |
| 8965550 | Experiments method for predicting wafer fabrication outcome | Ji-Fu Kung | 2015-02-24 |
| 8930865 | Layout correcting method and layout correcting system | Ji-Fu Kung | 2015-01-06 |
| 8643397 | Transistor array for testing | Ji-Fu Kung | 2014-02-04 |
| 8434030 | Integrated circuit design and fabrication method by way of detecting and scoring hotspots | Ji-Fu Kung | 2013-04-30 |
| 8410571 | Layout of dummy patterns | — | 2013-04-02 |
| 7566647 | Method of disposing and arranging dummy patterns | — | 2009-07-28 |