Issued Patents All Time
Showing 26–42 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7133791 | Two-mean level-crossing time interval estimation method | — | 2006-11-07 |
| 6898162 | Method and related apparatus for storing program code and optimized power calibration data in the same non-volatile memory | Hao Su | 2005-05-24 |
| 6708884 | Method and apparatus for rapid and precision detection of omnidirectional postnet barcode location | Yun-Qing Shi, Cheng-Jyh Chang, Shu-Yang Lin | 2004-03-23 |
| 6694473 | Parallel signal decoding method | Shih-Yung Chen | 2004-02-17 |
| 6636882 | Means and method for performing multiplication | Shin Yung Chen Banyan, Yi-Lin Lai | 2003-10-21 |
| 6581083 | Syndrome generator and method for generating syndromes in a video/audio processing system | Shin Yung Chen, Pei-Jei Hu | 2003-06-17 |
| 6523083 | System and method for updating flash memory of peripheral device | Kun-Long Lin, Pei-Jei Hu | 2003-02-18 |
| 6499082 | Method of transferring data from large capacity data storage device | Kun-Long Lin, Pei-Jei Hu | 2002-12-24 |
| 6457035 | Table matching for multiplication of elements in Galois Field | Banyan Shin Yung Chen, Yi-Lin Lai | 2002-09-24 |
| 6346896 | Decoding apparatus and method for deinterleaving data | Shin Yung Chen | 2002-02-12 |
| 6332032 | Method for generating test files from scanned test vector pattern drawings | Gerald T. Michael, Michael A. Dukes | 2001-12-18 |
| 6314194 | Method for generating computer aided design programming circuit designs from scanned images of the design | Gerald T. Michael, Michael A. Dukes | 2001-11-06 |
| 5974242 | Methods and computer programs for minimizing logic circuit design using identity cells | T. Raju Damarla | 1999-10-26 |
| 5946415 | Method and apparatus to process drawing images | Gerald T. Michael | 1999-08-31 |
| 5790412 | Recursive frequency aging estimation and prediction devices, methods and computer programs for crystal oscillators | — | 1998-08-04 |
| 5786735 | Phase and magnitude compensated tuning for suppression of vibration induced phase noise of crystal oscillator with varying vibration frequencies | — | 1998-07-28 |
| 5745500 | Built-in self testing for the identification of faulty integrated circuit chips in a multichip module | Thyagaraju Damarla, Moon Jae CHUNG, Gerald T. Michael | 1998-04-28 |