Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5032783 | Test circuit and scan tested logic device with isolated data lines during testing | Theo J. Powell | 1991-07-16 |
| 4710933 | Parallel/serial scan system for testing logic circuits | Theo J. Powell, Jeffrey D. Bellay, Martin D. Daniels | 1987-12-01 |
| 4701921 | Modularized scan path for serially tested logic circuit | Theo J. Powell | 1987-10-20 |
| 4698588 | Transparent shift register latch for isolating peripheral ports during scan testing of a logic circuit | Theo J. Powell | 1987-10-06 |