Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8693681 | Kasumi cipher executable instructions and circuitry | David Hoyle | 2014-04-08 |
| 8392789 | Method and system for decoding low density parity check codes | Eric Biscondi, David Hoyle | 2013-03-05 |
| 8151031 | Local memories with permutation functionality for digital signal processors | Eric Biscondi, David Hoyle | 2012-04-03 |
| 7617440 | Viterbi traceback initial state index initialization for partial cascade processing | — | 2009-11-10 |
| 7594162 | Viterbi pretraceback for partial cascade processing | — | 2009-09-22 |
| 7065699 | Using quadrant shifting to facilitate binary arithmetic with two's complement operands | Alan Gatherer | 2006-06-20 |
| 7020827 | Cascade map decoder and method | Alan Gatherer | 2006-03-28 |
| 6996765 | Turbo decoder prolog reduction | Antonio F. Mondragon-Torres, Alan Gatherer | 2006-02-07 |
| 6993704 | Concurrent memory control for turbo decoders | — | 2006-01-31 |
| 6980605 | MAP decoding with parallelized sliding window processing | Alan Gatherer, Armelle Laine | 2005-12-27 |
| 6898254 | Turbo decoder stopping criterion improvement | William J. Ebel, Sr. | 2005-05-24 |
| 6775801 | Turbo decoder extrinsic normalization | Antonio F. Mondragon-Torres | 2004-08-10 |
| 6754355 | Digital hearing device, method and system | Trudy D. Stetzler, Pedro Gelabert | 2004-06-22 |
| 6725409 | DSP instruction for turbo decoding | — | 2004-04-20 |
| 6473779 | Combinatorial polynomial multiplier for galois field 256 arithmetic | — | 2002-10-29 |
| 6385751 | Programmable, reconfigurable DSP implementation of a Reed-Solomon encoder/decoder | — | 2002-05-07 |
| 6366941 | Multi-dimensional Galois field multiplier | Patrick W. Bosshart, David R. Shoemaker | 2002-04-02 |
| 6275548 | Timing recovery system | Alan Gatherer | 2001-08-14 |
| 6263470 | Efficient look-up table methods for Reed-Solomon decoding | Ching-Yu Hung, Yaqi Cheng | 2001-07-17 |
| 6209114 | Efficient hardware implementation of chien search polynomial reduction in reed-solomon decoding | Jonathan H. Shiell | 2001-03-27 |
| 6154869 | Combined error position circuit and chien search circuit for reed-solomon decoding | — | 2000-11-28 |
| 6134572 | Galois Field arithmetic apparatus and method | William J. Ebel, Sr. | 2000-10-17 |
| 5951677 | Efficient hardware implementation of euclidean array processing in reed-solomon decoding | Jonathan H. Shiell | 1999-09-14 |