Issued Patents All Time
Showing 1–25 of 51 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9141561 | Master circuits having dynamic priority leads coupled with memory controller | Marouane Berrada, Stephen Busch, Denis Beaudoin | 2015-09-22 |
| 8539159 | Dirty cache line write back policy based on stack size trend information | Gerard Chauvel, Dominique D'Inverno | 2013-09-17 |
| 8429383 | Multi-processor computing system having a JAVA stack machine and a RISC-based processor | Gerard Chauvel, Maija Kuusela, Dominique D'Inverno | 2013-04-23 |
| 8190861 | Micro-sequence based security model | Gerard Chauvel, Gilbert Cabillic, Jean-Philippe Lesot, Dominique D'Inverno, Eric Louis Pierre Badi | 2012-05-29 |
| 8156283 | Processing function connected to processor memory hierarchy | Eric Louis Pierre Badi | 2012-04-10 |
| 8032891 | Energy-aware scheduling of application execution | Gerard Chauvel, Dominique D'Inverno, Maija Kuusela, Gilbert Cabillic, Jean-Philippe Lesot +4 more | 2011-10-04 |
| 7941790 | Data processing apparatus, system and method | Gilbert Cabillic, Jean-Philippe Lesot, Michel Banatre, Gerard Chauvel, Dominique D'Inverno +4 more | 2011-05-10 |
| 7840784 | Test and skip processor instruction having at least one register operand | Gerard Chauvel, Dominique D'Inverno | 2010-11-23 |
| 7840782 | Mixed stack-based RISC processor | Gerard Chauvel, Dominique D'Inverno | 2010-11-23 |
| 7757067 | Pre-decoding bytecode prefixes selectively incrementing stack machine program counter | Gerard Chauvel, Maija Kuusela | 2010-07-13 |
| 7712098 | Data transfer controlled by task attributes | Gerard Chauvel, Edward Ferguson | 2010-05-04 |
| 7634643 | Stack register reference control bit in source operand of instruction | Gerard Chauvel, Dominique D'Inverno | 2009-12-15 |
| 7565385 | Embedded garbage collection | Gerard Chauvel, Dominique D'Inverno, Maija Kuusela, Gilbert Cabillic, Jean-Philippe Lesot +4 more | 2009-07-21 |
| 7555611 | Memory management of local variables upon a change of context | Maija Kuusela, Gerard Chauvel | 2009-06-30 |
| 7509391 | Unified memory management system for multi processor heterogeneous architecture | Gerard Chauvel, Dominique D'Inverno | 2009-03-24 |
| 7496930 | Accessing device driver memory in programming language representation | Gerard Chauvel, Dominique D'Inverno, Maija Kuusela, Gilbert Cabillic, Jean-Philippe Lesot +4 more | 2009-02-24 |
| 7434021 | Memory allocation in a multi-processor system | Gerard Chauvel, Dominique D'Inverno, Maija Kuusela, Gilbert Cabillic, Jean-Philippe Lesot +4 more | 2008-10-07 |
| 7434029 | Inter-processor control | Gerard Chauvel | 2008-10-07 |
| 7386671 | Smart cache | Gerard Chauvel, Dominique D'Inverno | 2008-06-10 |
| 7360060 | Using IMPDEP2 for system commands related to Java accelerator hardware | Gerard Chauvel | 2008-04-15 |
| 7330937 | Management of stack-based memory usage in a processor | Gerard Chauvel, Dominique D'Inverno, Maija Kuusela, Gilbert Cabillic, Jean-Philippe Lesot +4 more | 2008-02-12 |
| 7162586 | Synchronizing stack storage | Gerard Chauvel | 2007-01-09 |
| 7058765 | Processor with a split stack | Gerard Chauvel, Maija Kuusela | 2006-06-06 |
| 6996683 | Cache coherency in a multi-processor system | Gerard Chauvel, Maija Kuusela, Dominique D'Inverno | 2006-02-07 |
| 6968400 | Local memory with indicator bits to support concurrent DMA and CPU access | — | 2005-11-22 |