Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4476482 | Silicide contacts for CMOS devices | David B. Scott, Yee-Chaung See | 1984-10-09 |
| 4420344 | CMOS Source/drain implant process without compensation of polysilicon doping | David B. Scott | 1983-12-13 |
| 4418094 | Vertical-etch direct moat isolation process | Yee-Chaung See, Dennis C. Hartman | 1983-11-29 |
| 4406710 | Mask-saving technique for forming CMOS source/drain regions | David B. Scott | 1983-09-27 |
| 4374700 | Method of manufacturing silicide contacts for CMOS devices | David B. Scott, Yee-Chaung See | 1983-02-22 |