Issued Patents All Time
Showing 26–50 of 78 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6156651 | Metallization method for porous dielectrics | — | 2000-12-05 |
| 6130156 | Variable doping of metal plugs for enhanced reliability | Girish Dixit, Stephen W. Russell | 2000-10-10 |
| 6077782 | Method to improve the texture of aluminum metallization | Wei-Yung Hsu, Qi-Zhong Hong | 2000-06-20 |
| 5936295 | Multilevel interconnect structure with air gaps formed between metal leads | Shin-Puu Jeng | 1999-08-10 |
| 5891804 | Process for conductors with selective deposition | Richard Stoltz | 1999-04-06 |
| 5814558 | Interconnect capacitance between metal leads | Shin-Puu Jeng | 1998-09-29 |
| 5789319 | Method of dual masking for selective gap fill of submicron interconnects | Richard Stoltz | 1998-08-04 |
| 5789818 | Structure with selective gap fill of submicron interconnects | — | 1998-08-04 |
| 5786624 | Dual masking for selective gap fill of submicron interconnects | Richard Stoltz | 1998-07-28 |
| 5751066 | Structure with selective gap fill of submicron interconnects | — | 1998-05-12 |
| 5747880 | Interconnect structure with an integrated low density dielectric | Shin-Puu Jeng, Bruce E. Gnade, Chih-Chen Cho | 1998-05-05 |
| 5728628 | Two-step metal etch process for selective gap fill of submicron inter-connects and structure for same | — | 1998-03-17 |
| 5668398 | Multilevel interconnect structure with air gaps formed between metal leads | Shin-Puu Jeng | 1997-09-16 |
| 5668411 | Diffusion barrier trilayer for minimizing reaction between metallization layers of integrated circuits | Qi-Zhong Hong, Shin-Puu Jeng | 1997-09-16 |
| 5661344 | Porous dielectric material with a passivation layer for electronics applications | Bruce E. Gnade, Chih-Chen Cho | 1997-08-26 |
| 5605724 | Method of forming a metal conductor and diffusion layer | Qi-Zhong Hong | 1997-02-25 |
| 5565384 | Self-aligned via using low permittivity dielectric | — | 1996-10-15 |
| 5488015 | Method of making an interconnect structure with an integrated low density dielectric | Shin-Puu Jeng, Bruce E. Gnade, Chih-Chen Cho | 1996-01-30 |
| 5482894 | Method of fabricating a self-aligned contact using organic dielectric materials | — | 1996-01-09 |
| 5472913 | Method of fabricating porous dielectric material with a passivation layer for electronics applications | Bruce E. Gnade, Chih-Chen Cho | 1995-12-05 |
| 5468662 | Method of making thin film transistor and a silicide local interconnect | — | 1995-11-21 |
| 5465005 | Polysilicon resistor structure including polysilicon contacts | Robert H. Eklund, Leo Stroth | 1995-11-07 |
| 5461003 | Multilevel interconnect structure with air gaps formed between metal leads | Shin-Puu Jeng | 1995-10-24 |
| 5451530 | Method for forming integrated circuits having buried doped regions | David A. Bell | 1995-09-19 |
| 5403759 | Method of making thin film transistor and a silicide local interconnect | — | 1995-04-04 |