Issued Patents All Time
Showing 26–36 of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4365261 | Co-planar barrier-type charge coupled device with enhanced storage capacity and decreased leakage current | Aloysious F. Tasch, Jr. | 1982-12-21 |
| 4364076 | Co-planar well-type charge coupled device with enhanced storage capacity and reduced leakage current | Aloysious F. Tasch, Jr. | 1982-12-14 |
| 4356040 | Semiconductor device having improved interlevel conductor insulation | Horng-Sen Fu, Al F. Tasch, Jr. | 1982-10-26 |
| 4353082 | Buried sense line V-groove MOS random access memory | — | 1982-10-05 |
| 4328511 | Taper isolated ram cell without gate oxide | Al F. Tasch, Jr., Geoff W. Taylor | 1982-05-04 |
| 4291391 | Taper isolated random access memory array and method of operating | Geoffrey W. Taylor | 1981-09-22 |
| 4272303 | Method of making post-metal ion beam programmable MOS read only memory | Al F. Tasch, Jr. | 1981-06-09 |
| 4268950 | Post-metal ion implant programmable MOS read only memory | Al F. Tasch, Jr. | 1981-05-26 |
| 4228445 | Dual plane well-type two-phase ccd | Al F. Tasch, Jr. | 1980-10-14 |
| 4227202 | Dual plane barrier-type two-phase CCD | Al F. Tasch, Jr. | 1980-10-07 |
| 4203125 | Buried storage punch through dynamic ram cell | Geoff W. Taylor, Al F. Tasch, Jr., Horng-Sen Fu | 1980-05-13 |