Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12411694 | Processor having adaptive pipeline with latency reduction logic that selectively executes instructions to reduce latency | Christian Wiencke, Shrey Bhatia | 2025-09-09 |
| 11868780 | Central processor-coprocessor synchronization | Christian Wiencke, Armin Stingl | 2024-01-09 |
| 11132203 | System and method for synchronizing instruction execution between a central processor and a coprocessor | Christian Wiencke, Armin Stingl | 2021-09-28 |