Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9666251 | Trim control with default trim code circuit and second multiplexers | Matthew Bullock | 2017-05-30 |
| 9548855 | Method and apparatus for managing estimation and calibration of non-ideality of a phase interpolator (PI)-based clock and data recovery (CDR) circuit | Biman Chattopadhyay, Sujoy Chakravarty, Ravi Mehta | 2017-01-17 |
| 9287869 | Data bus synchronizer without an enable signal input | — | 2016-03-15 |
| 9093336 | Determining optimum code from default, programmable, and test trim codes | Matthew Bullock | 2015-07-28 |
| 8054103 | Synchronous clock multiplexing and output-enable | Jayawardan Janardhanan, Vikas Sinha, Sujoy Chakravarty, Shivaprakash Halagur, Somasunder Kattepura Sreenath | 2011-11-08 |