Issued Patents All Time
Showing 76–100 of 110 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5598374 | Pipeland address memories, and systems and methods using the same | — | 1997-01-28 |
| 5583822 | Single chip controller-memory device and a memory architecture and methods suitable for implementing the same | — | 1996-12-10 |
| 5567963 | Multi-bit data storage location | — | 1996-10-22 |
| 5568431 | Memory architecture and devices, systems and methods utilizing the same | — | 1996-10-22 |
| 5537353 | Low pin count-wide memory devices and systems and methods using the same | Ronald T. Taylor, Sudhir Sharma | 1996-07-16 |
| 5529945 | Methods for fabricating a multi-bit storage cell | — | 1996-06-25 |
| 5473573 | Single chip controller-memory device and a memory architecture and methods suitable for implementing the same | — | 1995-12-05 |
| 5473566 | Memory architecture and devices, systems and methods utilizing the same | — | 1995-12-05 |
| 4748349 | High performance dynamic sense amplifier with voltage boost for row address lines | Joseph C. McAlexander, Lionel S. White, Jr. | 1988-05-31 |
| 4587542 | Guard ring for reducing pattern sensitivity in MOS/LSI dynamic RAM | — | 1986-05-06 |
| 4574465 | Differing field oxide thicknesses in dynamic memory device | — | 1986-03-11 |
| 4543500 | High performance dynamic sense amplifier voltage boost for row address lines | Joseph C. McAlexander, Lionel S. White, Jr. | 1985-09-24 |
| 4543501 | High performance dynamic sense amplifier with dual channel grounding transistor | Joseph C. McAlexander, Lionel S. White, Jr. | 1985-09-24 |
| 4494223 | Sequentially clocked substrate bias generator for dynamic memory | Chitranjan N. Reddy | 1985-01-15 |
| 4494222 | Processor system using on-chip refresh address generator for dynamic memory | Lionel S. White, Jr. | 1985-01-15 |
| 4457066 | Method of making single-level polysilicon dynamic memory array | Donald J. Redwine | 1984-07-03 |
| 4418293 | High performance dynamic sense amplifier with multiple column outputs | Joseph C. McAlexander, Lionel S. White, Jr. | 1983-11-29 |
| 4388121 | Reduced field implant for dynamic memory cell array | — | 1983-06-14 |
| 4380863 | Method of making double level polysilicon series transistor devices | — | 1983-04-26 |
| 4370575 | High performance dynamic sense amplifier with active loads | Joseph C. McAlexander, Lionel S. White, Jr. | 1983-01-25 |
| 4347587 | Semiconductor integrated circuit memory device with both serial and random access arrays | — | 1982-08-31 |
| 4339766 | Dummy columns for reducing pattern sensitivity in MOS/LSI dynamic RAM | — | 1982-07-13 |
| 4330852 | Semiconductor read/write memory array having serial access | Donald J. Redwine, Lionel S. White, Jr. | 1982-05-18 |
| 4328510 | High density read/write memory cell | — | 1982-05-04 |
| 4319263 | Double level polysilicon series transistor devices | — | 1982-03-09 |