PK

Pavlos Konas

TE Tensilica: 6 patents #9 of 43Top 25%
CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
Apple: 1 patents #12,251 of 18,612Top 70%
📍 Mountain View, CA: #2,364 of 11,022 inventorsTop 25%
🗺 California: #66,801 of 386,348 inventorsTop 20%
Overall (All Time): #570,075 of 4,157,543Top 15%
9
Patents All Time

Issued Patents All Time

Showing 1–9 of 9 patents

Patent #TitleCo-InventorsDate
9582278 Automated processor generation system and method for designing a configurable processor Albert Ren-Rui Wang, Richard Ruddell, David William Goodwin, Earl A. Killian, Nupur Bhattacharyya +7 more 2017-02-28
9015422 Access map-pattern match based prefetch unit for a processor Stephan G. Meier, Gerard R. Williams, III, Hari Kannan 2015-04-21
8639487 Method for multiple processor system-on-a-chip hardware and software cogeneration Gulbin Ezer, John Barrett Andrews, Stephen Wei Chou, Eileen Margaret Peters Long, Marc Evans 2014-01-28
8161432 Automated processor generation system and method for designing a configurable processor Albert Ren-Rui Wang, Richard Ruddell, David William Goodwin, Earl A. Killian, Nupur Bhattacharyya +7 more 2012-04-17
7437700 Automated processor generation system and method for designing a configurable processor Albert Ren-Rui Wang, Richard Ruddell, David William Goodwin, Earl A. Killian, Nupur Bhattacharyya +7 more 2008-10-14
7036106 Automated processor generation system for designing a configurable processor and method for the same Albert Ren-Rui Wang, Richard Ruddell, David William Goodwin, Earl A. Killian, Nupur Bhattacharyya +7 more 2006-04-25
6854046 Configurable memory management unit Marc Evans, Earl A. Killian 2005-02-08
6763327 Abstraction of configurable processor functionality for operating systems portability Christopher Mark Songer, Marc Gauthier, Kevin C. Chea 2004-07-13
6732238 Set-associative cache memory having variable time decay rewriting algorithm Marc Evans 2004-05-04