Issued Patents All Time
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11736594 | Low-latency FPGA framework based on reliable UDP and TCP re-assembly middleware | Dhaval Shah, Sunil PURANIK, Manoj Karunakaran Nambiar, Mahesh Damodar Barve, Ishtiyaque Shaikh +1 more | 2023-08-22 |