Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11736594 | Low-latency FPGA framework based on reliable UDP and TCP re-assembly middleware | Dhaval Shah, Sunil PURANIK, Manoj Karunakaran Nambiar, Mahesh Damodar Barve, Piyush Manavar +1 more | 2023-08-22 |
| 11611638 | Re-assembly middleware in FPGA for processing TCP segments into application layer messages | Dhaval Shah, Sunil PURANIK, Manoj Karunakaran Nambiar, Mahesh Damodar Barve | 2023-03-21 |