JK

Joseph C. Klein

TT Tanisys Technology: 1 patents #7 of 13Top 55%
Overall (All Time): #2,135,482 of 4,157,543Top 55%
2
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7539912 Method and apparatus for testing a fully buffered memory module Hong Liang Chan, Allen Lawrence, Sunny Lai-Ming Chang, Bosco Chun Sang Lai 2009-05-26
6892328 Method and system for distributed testing of electronic devices Jack C. Little, Paul R. Hunter, Archer R. Lawrence 2005-05-10