Issued Patents All Time
Showing 1–25 of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12349469 | Stack-gate circuit | Wen-Shen Chou, Yung-Chow Peng | 2025-07-01 |
| 12199086 | Stack-gate circuit | Wen-Shen Chou, Yung-Chow Peng | 2025-01-14 |
| 12169675 | Automatic generation of layouts for analog integrated circuits | Wen-Shen Chou, Yung-Chow Peng, Yung-Hsu Chuang | 2024-12-17 |
| 12147752 | Pre-characterization mixed-signal design, placement, and routing using machine learning | Wen-Shen Chou, Jie-Ren Huang, Yung-Chow Peng, Yung-Hsu Chuang | 2024-11-19 |
| 12118287 | Automatic generation of sub-cells for an analog integrated circuit | Chih-Chiang Chang, Wen-Shen Chou, Yung-Chow Peng, Yung-Hsu Chuang, Bindu Madhavi Kasina | 2024-10-15 |
| 12106031 | Transition cells for advanced technology processes | Yung-Hsu Chuang, Wen-Shen Chou, Yung-Chow Peng, Yun-Ru Chen | 2024-10-01 |
| 11847399 | Integrated circuit with asymmetric mirrored layout analog cells | Wen-Shen Chou, Yung-Chow Peng | 2023-12-19 |
| 11816414 | Automatic generation of sub-cells for an analog integrated circuit | Chih-Chiang Chang, Wen-Shen Chou, Yung-Chow Peng, Yung-Hsu Chuang, Bindu Madhavi Kasina | 2023-11-14 |
| 11763060 | Automatic generation of layouts for analog integrated circuits | Wen-Shen Chou, Yung-Chow Peng, Yung-Hsu Chuang | 2023-09-19 |
| 11704470 | Pre-characterization mixed-signal design, placement, and routing using machine learning | Wen-Shen Chou, Jie-Ren Huang, Yung-Chow Peng, Yung-Hsu Chuang | 2023-07-18 |
| 11429775 | Automatic generation of sub-cells for an analog integrated circuit | Chih-Chiang Chang, Wen-Shen Chou, Yung-Chow Peng, Yung-Hsu Chuang, Bindu Madhavi Kasina | 2022-08-30 |
| 11309306 | Stack-gate circuit | Wen-Shen Chou, Yung-Chow Peng | 2022-04-19 |
| 11270057 | Semiconductor device including regions for reducing density gradient effect and method of forming the same | Yung-Hsu Chuang, Wen-Shen Chou, Yung-Chow Peng | 2022-03-08 |
| 11238207 | Method and system for fabricating integrated circuit with aid of programmable circuit synthesis | Yung-Hsu Chuang, Wen-Shen Chou, Jie-Ren Huang, Yung-Chow Peng, Yun-Ru Chen | 2022-02-01 |
| 11106854 | Transition cells for advanced technology processes | Yung-Hsu Chuang, Wen-Shen Chou, Yung-Chow Peng, Yun-Ru Chen | 2021-08-31 |
| 11106855 | Pre-characterization mixed-signal design, placement, and routing using machine learning | Wen-Shen Chou, Jie-Ren Huang, Yung-Chow Peng, Yung-Hsu Chuang | 2021-08-31 |
| 10997354 | Integrated circuit with asymmetric mirrored layout analog cells | Wen-Shen Chou, Yung-Chow Peng | 2021-05-04 |
| 10872189 | Uni-gate cell design | Wen-Shen Chou, Po-Zeng Kang, Yung-Chow Peng, Yung-Hsu Chuang | 2020-12-22 |
| 10860777 | Method and system for fabricating integrated circuit with aid of programmable circuit synthesis | Yung-Hsu Chuang, Wen-Shen Chou, Jie-Ren Huang, Yung-Chow Peng, Yun-Ru Chen | 2020-12-08 |
| 10733353 | System and method for forming integrated device | Yung-Chow Peng | 2020-08-04 |
| 10281501 | Peak current evaluation system and peak current evaluation method | Wen-Shen Chou, Yung-Chow Peng | 2019-05-07 |
| 10274536 | Time to current converter | Yung-Chow Peng, Po-Zeng Kang, Wen-Shen Chou | 2019-04-30 |
| 10213993 | Multilayer composite article | Kui Chen-Ho, Caroline M. Ylitalo, Yongshang Lu, Alan L. Levin, Hyacinth L. Lechuga +4 more | 2019-02-26 |
| 10141934 | High speed level-shifter | Wen-Shen Chou, Yung-Chow Peng | 2018-11-27 |
| 9573129 | Sensing system and sensor chip thereof | Chen-Yi Lee, Kelvin Yi-Tse Lai | 2017-02-21 |