Issued Patents All Time
Showing 51–63 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10062782 | Method of manufacturing a semiconductor device with multilayered channel structure | Chao-Ching Cheng, Chih Chieh Yeh, Cheng-Hsien Wu, Hung-Li Chiang, Jung-Piao Chiu +3 more | 2018-08-28 |
| 9991647 | Plug connector having a circuit board with an encryption chip connected to a terminal | Feng Liu | 2018-06-05 |
| 9853101 | Strained nanowire CMOS device and method of forming | Cheng-Yi Peng, Hung-Li Chiang, Chih Chieh Yeh, Yee-Chia Yeo, Chi-Wen Liu | 2017-12-26 |
| 9768301 | Short channel effect suppression | Cheng-Yi Peng, Chia-Cheng Ho, Chih-Sheng Chang, Yee-Chia Yeo | 2017-09-19 |
| 9728461 | Method of forming semiconductor device with different threshold voltages | Cheng-Yi Peng, Chia-Cheng Ho, Chih Chieh Yeh, Tsung-Lin Lee | 2017-08-08 |
| 9659826 | Asymmetric source/drain depths | Cheng-Yi Peng, Chia-Cheng Ho, Jung-Piao Chiu, Tsung-Lin Lee, Chih Chieh Yeh +2 more | 2017-05-23 |
| 9515071 | Asymmetric source/drain depths | Cheng-Yi Peng, Chia-Cheng Ho, Jung-Piao Chiu, Tsung-Lin Lee, Chih Chieh Yeh +2 more | 2016-12-06 |
| 9461041 | Metal gate finFET device | Tsu-Hsiu Perng, Chih Chieh Yeh, Li-Shyue Lai | 2016-10-04 |
| 8921218 | Metal gate finFET device and method of fabricating thereof | Tsu-Hsiu Perng, Chih Chieh Yeh, Li-Shyue Lai | 2014-12-30 |
| 8659128 | Flip chip package structure with heat dissipation enhancement and its application | Lih-Ming Doong | 2014-02-25 |
| 8097952 | Electronic package structure having conductive strip and method | — | 2012-01-17 |
| 7960213 | Electronic package structure and method | — | 2011-06-14 |
| 7528495 | Chip structure | — | 2009-05-05 |