Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12388426 | Flip-flop cell | Chien-Te Wu, Shang-Chih Hsieh, Nick Tsai | 2025-08-12 |
| 12368442 | Low power clock network | Po Chun Lu | 2025-07-22 |
| 12131110 | Apparatus and method for advanced macro clock skewing | Ming-Chieh Tsai | 2024-10-29 |
| 11855647 | Low power clock network | Po Chun Lu | 2023-12-26 |
| 11637547 | Flip-flop cell | Chien-Te Wu, Shang-Chih Hsieh, Nick Tsai | 2023-04-25 |
| 11494545 | Apparatus and method for advanced macro clock skewing | Ming-Chieh Tsai | 2022-11-08 |
| 11436483 | Neural network engine with tile-based execution | Yu-Ting Kuo, Chien-Hung Lin, ShengJe Hung, Meng-Hsuan Cheng, Chi-Ta Wu +3 more | 2022-09-06 |
| 11394388 | Low power clock network | Po Chun Lu | 2022-07-19 |
| 11165269 | Electronic apparatus, charging method, and non-transitory computer readable recording medium | Ding-Jun Yin | 2021-11-02 |
| 11095272 | Flip-flop cell | Chien-Te Wu, Shang-Chih Hsieh, Nick Tsai | 2021-08-17 |
| 10868545 | Low power clock network | Po Chun Lu | 2020-12-15 |
| 8701070 | Group bounding box region-constrained placement for integrated circuit design | Yi-Lin Chuang, Chun-Cheng Ku, Yun-Han Lee, Wei-Pin Changchien, Chin-Chou Liu | 2014-04-15 |
| 7235950 | Protection circuit limiting current applied to peripheral devices | Sea-Weng Young | 2007-06-26 |
| 6912703 | Structure of integrated circuit standard cell library for reducing power supply voltage fluctuation | Chien-Te Wu, Jun-Jyeh Hsiao | 2005-06-28 |
| 6594809 | Low leakage antenna diode insertion for integrated circuits | Wen-Hsiang Huang, Hsiao-Pin Su, Jun-Jyeh Hsiao | 2003-07-15 |
| 6191020 | Conductive interconnection for semiconductor integrated circuit and method of forming the same | Jing-Meng Liu | 2001-02-20 |