Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9922162 | Resistive capacitance determination method for multiple-patterning-multiple spacer integrated circuit layout | Chia-Ming Ho, C. Y. Chen, Hsiu-Wen Hsueh, Jun Huang | 2018-03-20 |
| 9218448 | Resistive capacitance determination method for multiple-patterning-multiple spacer integrated circuit layout | Chia-Ming Ho, C. Y. Chen, Hsiu-Wen Hsueh, Jun Huang | 2015-12-22 |