Issued Patents All Time
Showing 51–74 of 74 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9728637 | Mechanism for forming semiconductor device with gate | Jung-Chi Jeng, I-Chih Chen, Wen-Chang Kuo, Ying-Hao Chen, Chih-Mu Huang | 2017-08-08 |
| 9634122 | Device boost by quasi-FinFET | Ling-Sung Wang, Chih-Mu Huang, Chia-Ming Chang | 2017-04-25 |
| 9570561 | Modified channel position to suppress hot carrier injection in FinFETs | Yi-Ju Chen, Sheng-Fu Yu, I-Shan Huang, Kuan-Yu Chen, Li-Yi Chen | 2017-02-14 |
| 9564487 | Dual vertical channel | Chia-Ming Chang, Huang Jiun-Jie, Ling-Sung Wang | 2017-02-07 |
| 9558955 | Formation method of semiconductor device that includes performing hydrogen-containing plasma treatment on metal gate stack | Chi-Cherng Jeng, Chih-Mu Huang, Shin-Yeu Tsai, Fang-Wei Lin | 2017-01-31 |
| 9543399 | Device having sloped gate profile and method of manufacture | Ling-Sung Wang, Chih-Mu Huang, Yao-Tsung Chen, Ming-Tsang Tsai, Kuan-Yu Chen | 2017-01-10 |
| 9490254 | Fin sidewall removal to enlarge epitaxial source/drain volume | Chien-Hsun Lin, Sheng-Fu Yu, Yu-Chang Liang, Kuan-Yu Chen, Li-Yi Chen | 2016-11-08 |
| 9466670 | Sandwich epi channel for device enhancement | Ling-Sung Wang, Chih-Mu Huang, Cing-Yao Chan, Chun-Ying Wang, Jen-Pan Wang | 2016-10-11 |
| 9449811 | Air-gap scheme for BEOL process | Chih-Fu Chang, Jen-Pan Wang | 2016-09-20 |
| 9318371 | Shallow trench isolation structure | Ling-Sung Wang, Chih-Mu Huang, Chih-Fu Chang | 2016-04-19 |
| 9299734 | Methods of stress engineering to reduce dark current of CMOS image sensors | Nai-Wen Cheng, Chung-Te Lin, Chien-Hsien Tseng, Shou-Gwo Wuu | 2016-03-29 |
| 9287139 | Re-crystallization for boosting stress in MOS device | Cing-Yao Chan, Chun-Ying Wang, Jen-Pan Wang | 2016-03-15 |
| 9281215 | Mechanism for forming gate | Jung-Chi Jeng, I-Chih Chen, Wen-Chang Kuo, Ying-Hao Chen, Chih-Mu Huang | 2016-03-08 |
| 9252233 | Air-gap offset spacer in FinFET structure | Rou-Han Kuo, Ting-Fu Lin, Sheng-Fu Yu, Tzung-Da Liu, Li-Yi Chen | 2016-02-02 |
| 9246002 | Structure and method for semiconductor device | Ling-Sung Wang, Chih-Mu Huang, Chih-Kang Chao, Chen-Chieh Chiang | 2016-01-26 |
| 9217917 | Three-direction alignment mark | I-I Cheng, Jia-Ming Huang, Jen-Pan Wang, Ling-Sung Wang, Chih-Mu Huang | 2015-12-22 |
| 9209304 | N/P MOS FinFET performance enhancement by specific orientation surface | Hung-Pin Chen, Wei-Barn Chen, Chih-Fu Chang, Chih-Kang Chao, Ling-Sung Wang | 2015-12-08 |
| 9159812 | Fin sidewall removal to enlarge epitaxial source/drain volume | Chien-Hsun Lin, Sheng-Fu Yu, Yu-Chang Liang, Kuan-Yu Chen, Li-Yi Chen | 2015-10-13 |
| 8778717 | Local oxidation of silicon processes with reduced lateral oxidation | Chung-Te Lin, Nai-Wen Cheng, Yin-Kai Liao, Wei Chuang Wu | 2014-07-15 |
| 8546860 | Stress engineering to reduce dark current of CMOS image sensors | Nai-Wen Cheng, Chung-Te Lin, Chien-Hsien Tseng, Shou-Gwo Wuu | 2013-10-01 |
| 8389377 | Sensor element isolation in a backside illuminated image sensor | Kun-Yu Tsai, Chien-Hsien Tseng, Shou-Gwo Wuu, Nai-Wen Cheng | 2013-03-05 |
| 8216905 | Stress engineering to reduce dark current of CMOS image sensors | Nai-Wen Cheng, Chung-Te Lin, Chien-Hsien Tseng, Shou-Gwo Wuu | 2012-07-10 |
| 8158474 | Semiconductor device with localized stressor | Min Cao, Chung-Te Lin, Ta-Ming Kuan, Cheng-Tung Hsu | 2012-04-17 |
| 7825477 | Semiconductor device with localized stressor | Min Cao, Chung-Te Lin, Ta-Ming Kuan, Cheng-Tung Hsu | 2010-11-02 |