Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12266602 | Integrated circuit structure and method for forming the same | Shih-Yen Lin, Yu Zhang, Si-Chen Lee, Chi-Tien Chen | 2025-04-01 |
| 11211460 | 2D crystal hetero-structures and manufacturing methods thereof | Shih-Yen Lin, Si-Chen Lee, Samuel C. Pan | 2021-12-28 |
| 11121214 | Source/drain contact with 2-D material | Shih-Yen Lin, Hsuan-An Chen, Lun-Ming Lee | 2021-09-14 |
| 10985019 | Method of forming a semiconductor device using layered etching and repairing of damaged portions | Shih-Yen Lin, Si-Chen Lee, Samuel C. Pan | 2021-04-20 |
| 10784351 | 2D crystal hetero-structures and manufacturing methods thereof | Shih-Yen Lin, Si-Chen Lee, Samuel C. Pan | 2020-09-22 |
| 10636652 | Method of forming a semiconductor device using layered etching and repairing of damaged portions | Shih-Yen Lin, Si-Chen Lee, Samuel C. Pan | 2020-04-28 |
| 10269564 | Method of forming a semiconductor device using layered etching and repairing of damaged portions | Shih-Yen Lin, Si-Chen Lee, Samuel C. Pan | 2019-04-23 |
| 10147603 | Method of manufacturing a FET using a two dimensional transition metal dichalcogenide including a low power oxygen plasma treatment | Shih-Yen Lin, Chi-Wen Liu, Si-Chen Lee, Chong-Rong Wu | 2018-12-04 |