Issued Patents All Time
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6291304 | Method of fabricating a high voltage transistor using P+ buried layer | Ruey-Hsin Liu, Jyh-Min Jiang, Jei-Feng Hwang | 2001-09-18 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6291304 | Method of fabricating a high voltage transistor using P+ buried layer | Ruey-Hsin Liu, Jyh-Min Jiang, Jei-Feng Hwang | 2001-09-18 |