HY

Hung-Chang Yu

TSMC: 60 patents #527 of 12,232Top 5%
CM Chartered Semiconductor Manufacturing: 1 patents #419 of 840Top 50%
📍 Dashulong, TW: #38 of 596 inventorsTop 7%
Overall (All Time): #37,466 of 4,157,543Top 1%
61
Patents All Time

Issued Patents All Time

Showing 26–50 of 61 patents

Patent #TitleCo-InventorsDate
9747159 MRAM smart bit write algorithm with error correction parity bits Yue-Der Chih, Kai-Chun Lin, Chin-Yi Huang, Laun C. Tran 2017-08-29
9742497 Semiconductor arrangement and formation thereof Kai-Chun Lin, Yu-Der Chih, Ying-Hao Kuo 2017-08-22
9711190 Stabilizing circuit Kai-Chun Lin, Ku-Feng Lin, Yue-Der Chih 2017-07-18
9673799 Sensing circuit with reduced bias clamp Ku-Feng Lin 2017-06-06
9413140 Semiconductor arrangement and formation thereof Ying-Hao Kuo, Kai-Chun Lin, Yue-Der Chih 2016-08-09
9406367 Method and apparatus for MRAM sense reference trimming Yue-Der Chih, Kai-Chun Lin 2016-08-02
9368552 Resistive memory array and fabricating method thereof Ku-Feng Lin, Kai-Chun Lin, Yue-Der Chih 2016-06-14
9330746 Resistive memory array Kai-Chun Lin, Ku-Feng Lin, Yue-Der Chih 2016-05-03
9299677 Package with multiple plane I/O structure Kai-Chun Lin, Yue-Der Chih 2016-03-29
9214931 Sensing circuit with reduced bias clamp Ku-Feng Lin 2015-12-15
9183895 Memory with dynamic feedback control circuit Yue-Der Chih 2015-11-10
9177621 Fast bit-line pre-charge scheme Ku-Feng Lin 2015-11-03
9165613 Sample-and-hold current sense amplifier and related method Ku-Feng Lin, Yue-Der Chih 2015-10-20
9165629 Method and apparatus for MRAM sense reference trimming Yue-Der Chih, Kai-Chun Lin 2015-10-20
9110829 MRAM smart bit write algorithm with error correction parity bits Yue-Der Chih, Kai-Chun Lin, Chin-Yi Huang, Laun C. Tran 2015-08-18
9058872 Resistance-based random access memory Kai-Chun Lin, Yue-Der Chih 2015-06-16
8964458 Differential MRAM structure with relatively reversed magnetic tunnel junction elements enabling writing using same polarity current Kai-Chun Lin, Yue-Der Chih, Chun-Jung Lin 2015-02-24
8923040 Accommodating balance of bit line and source line resistances in magnetoresistive random access memory Kai-Chun Lin, Ku-Feng Lin, Yue-Der Chih 2014-12-30
8908439 Adaptive word-line boost driver Ku-Feng Lin, Kai-Chun Lin 2014-12-09
8902641 Adjusting reference resistances in determining MRAM resistance states Yue-Der Chih, Chin-Yi Huang, Chun-Jung Lin, Kai-Chun Lin 2014-12-02
8842489 Fast-switching word line driver Ku-Feng Lin, Kai-Chun Lin, Yue-Der Chih 2014-09-23
8817553 Charge pump control scheme using frequency modulation for memory word line Yue-Der Chih 2014-08-26
8687412 Reference cell configuration for sensing resistance states of MRAM bit cells Yue-Der Chih, Chun-Jung Lin, Kai-Chun Lin 2014-04-01
8654589 Charge pump control scheme for memory word line Yue-Der Chih 2014-02-18
8625383 Memory word line boost using thin dielectric capacitor Yue-Der Chih 2014-01-07