Issued Patents All Time
Showing 176–186 of 186 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8621409 | System and method for reducing layout-dependent effects | Hui Yu Lee, Ching-Shun Yang, Yi-Kan Cheng, Jui-Feng Kuan | 2013-12-31 |
| 8593189 | Phase locked loop (PLL) with multi-phase time-to-digital converter (TDC) | Kuang-Kai Yen, Huan-Neng Chen, Lee Tsung Hsiung, Hsien-Yuan Liao, Robert Bogdan Staszewski | 2013-11-26 |
| 8570082 | PVT-free calibration circuit for TDC resolution in ADPLL | Kuang-Kai Yen, Huan-Neng Chen, Hsien-Yuan Liao, Lee Tsung Hsiung, Chewn-Pu Jou +1 more | 2013-10-29 |
| 8547151 | Phase-locked loops that share a loop filter | Shyh-An Chi, Huan-Neng Chen, Yen-Jen Chen, Chewn-Pu Jou | 2013-10-01 |
| 8476972 | Method and apparatus for amplifying a time difference | You-Jen Wang, Shen-Iuan Liu, Chewn-Pu Jou, Fu-Lung Hsueh | 2013-07-02 |
| 8477278 | Liquid crystal display panel | Chia-Hua Yu, Kun-Cheng Lee, I-Fang Wang | 2013-07-02 |
| 8456207 | Lock detector and method of detecting lock status for phase lock loop | Kyle Yen, Huan-Neng Chen, Yen-Jen Chen, Chewn-Pu Jou | 2013-06-04 |
| 8436686 | Method and apparatus for efficient time slicing | Ying-Ta Lu, Chewn-Pu Jou | 2013-05-07 |
| 8314652 | System and method for RC calibration using phase and frequency | Tsung-Hsien Tsai, Jia-Liang Chen | 2012-11-20 |
| 8193963 | Method and system for time to digital conversion with calibration and correction loops | You-Jen Wang, Shen-Iuan Liu, Chewn-Pu Jou, Fu-Lung Hsueh | 2012-06-05 |
| 8189158 | Fringe field switching liquid crystal display apparatus | Ko-Ruay Jen, Guang-Shiung Chao, Chia-Hua Yu, I-Fang Wang | 2012-05-29 |