Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9391067 | Multiple silicide integration structure and method | Der-Chyang Yeh, Hsing-Kuo Hsia, Hao-Hsun Lin, Chih-Ping Chao, Hsi-Kuei Cheng | 2016-07-12 |
| 8993393 | Multiple silicide integration structure and method | Der-Chyang Yeh, Hsing-Kuo Hsia, Hao-Hsun Lin, Chih-Ping Chao, Hsi-Kuei Cheng | 2015-03-31 |
| 7528478 | Semiconductor devices having post passivation interconnections and a buffer layer | Hsi-Kuei Cheng, Hung-Ju Chien, Hsun-Chang Chan, Chu-Chang Chen, Ying-Lang Wang +2 more | 2009-05-05 |
| 7026233 | Method for reducing defects in post passivation interconnect process | Hsi-Kuei Cheng, Hung-Ju Chien, Hsun-Chang Chan, Chu-Chang Chen, Ying-Lang Wang +2 more | 2006-04-11 |