Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12327586 | Bit line pre-charge circuit for power management modes in multi bank SRAM | Sanjeev Kumar Jain, Ruchin Jain, Atul Katoch | 2025-06-10 |
| 11935589 | Bit line pre-charge circuit for power management modes in multi bank SRAM | Sanjeev Kumar Jain, Ruchin Jain, Atul Katoch | 2024-03-19 |
| 11626158 | Bit line pre-charge circuit for power management modes in multi bank SRAM | Sanjeev Kumar Jain, Ruchin Jain, Atul Katoch | 2023-04-11 |
| 8681576 | Pre-charge and equalization devices | Atul Katoch, Cormac Michael O'Connell | 2014-03-25 |
| 6144591 | Redundancy selection circuit for semiconductor memories | Peter Vlasenko, John Wu, Guillaume Valcourt | 2000-11-07 |
| 5959903 | Column redundancy in semiconductor memories | Lidong Chen, John Wu | 1999-09-28 |
| 5877992 | Data-bit redundancy in semiconductor memories | John Wu, Guillaume Valcourt | 1999-03-02 |