Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MP

Mark S. Papamarcos — 6 Patents

SYSynopsys: 4 patents #328 of 2,302Top 15%
QSQuickturn Design Systems: 2 patents #33 of 71Top 50%
San Jose, CA: #9,609 of 32,062 inventorsTop 30%
California: #94,478 of 386,348 inventorsTop 25%
Overall (All Time): #779,687 of 4,157,543Top 20%
6 Patents All Time
Mark S. Papamarcos has been granted 6 US patents while listed as an inventor at Synopsys. The first was granted in 1994 and the most recent in November 2000. Mark S. Papamarcos ranks #779,687 of 4,157,543 US inventors in our database (top 18.8%). Patent records list Mark S. Papamarcos in San Jose, CA, US.

Issued Patents All Time

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
6148275 System for and method of connecting a hardware modeling element to a hardware modeling system Andrew Read, Wayne Phillip Heideman, Robert Kristianto Mardjuki, Robert K. Couch, Peter R. Jaeger +4 more 2000-11-14 $10,271,000
6141636 Logic analysis subsystem in a time-sliced emulator Tony R. Sarno, Ingo Schaefer, John E. Chilton, Bernard Y. Chan, Michael C. Tsou 2000-10-31
5963736 Software reconfigurable target I/O in a circuit emulation system Tony R. Sarno, Ingo Schaefer, John E. Chilton, Curt Blanding 1999-10-05
5625580 Hardware modeling system and method of use Andrew Read, Wayne Phillip Heideman, Robert Kristianto Mardjuki, Robert K. Couch, Peter R. Jaeger +3 more 1997-04-29 $23,787,000
5369593 System for and method of connecting a hardware modeling element to a hardware modeling system Andrew Read, Wayne Phillip Heideman, Robert Kristianto Mardjuki, Robert K. Couch, Peter R. Jaeger +4 more 1994-11-29 $7,621,000
5353243 Hardware modeling system and method of use Andrew Read, Wayne Phillip Heideman, Robert Kristianto Mardjuki, Robert K. Couch, Peter R. Jaeger +3 more 1994-10-04 $7,956,000