Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 6141636 | Logic analysis subsystem in a time-sliced emulator | Tony R. Sarno, Ingo Schaefer, Mark S. Papamarcos, Bernard Y. Chan, Michael C. Tsou | 2000-10-31 | |
| 5963736 | Software reconfigurable target I/O in a circuit emulation system | Tony R. Sarno, Ingo Schaefer, Mark S. Papamarcos, Curt Blanding | 1999-10-05 | |
| 5923865 | Emulation system having multiple emulated clock cycles per emulator clock cycle and improved signal routing | Tony R. Sarno, Ingo Schaefer | 1999-07-13 | |
| 5822564 | Checkpointing in an emulation system | Tony R. Sarno, Ingo Schaefer | 1998-10-13 | $2,725,000 |
| 5819065 | System and method for emulating memory | Tony R. Sarno, Ingo Schaefer | 1998-10-06 | $2,944,000 |