JD

Jishnu De

SY Synopsys: 3 patents #460 of 2,302Top 20%
Overall (All Time): #1,362,950 of 4,157,543Top 35%
3
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11979232 Verification of Ethernet hardware based on checksum correction with cyclic redundancy check Jaspreet Singh Gambhir 2024-05-07
11809363 Debug methodology for a USB sub-system using unique identifier (UID) approach Jaspreet Singh Gambhir 2023-11-07
11705986 Hardware based cyclic redundancy check (CRC) re-calculator for timestamped frames over a data bus Jaspreet Singh Gambhir, Jitendra PURI 2023-07-18