Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
JH

James Robert Howard Hakewill

SYSynopsys: 4 patents #328 of 2,302Top 15%
Apple: 3 patents #7,422 of 18,612Top 40%
AIArc International: 2 patents #3 of 18Top 20%
MTMips Technologies: 2 patents #56 of 129Top 45%
Tesla: 2 patents #322 of 838Top 40%
APArc International, Plc: 1 patents #1 of 14Top 8%
Los Gatos, CA: #596 of 2,986 inventorsTop 20%
California: #43,449 of 386,348 inventorsTop 15%
Overall (All Time): #338,994 of 4,157,543Top 9%
14 Patents All Time

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDate
12014553 Predicting three-dimensional features for autonomous driving Ashok Kumar Elluswamy, Matthew Bauch, Christopher Payne, Andrej Karpathy, Dhaval Shroff +1 more 2024-06-18
11150664 Predicting three-dimensional features for autonomous driving Ashok Kumar Elluswamy, Matthew Bauch, Christopher Payne, Andrej Karpathy, Dhaval Shroff +1 more 2021-10-19
10747539 Scan-on-fill next fetch target prediction Constantin Pistol 2020-08-18
10642618 Callgraph signature prefetch Nikhil Gupta 2020-05-05
10346309 Sequential prefetch boost Ian D. Kountanis, Douglas C. Holman 2019-07-09
9171114 Managing the configuration and functionality of a semiconductor design Mohammed Noshad Khan, Edward Plowman 2015-10-27
9003422 Microprocessor architecture having extendible logic Richard Fuhler 2015-04-07
8789042 Microprocessor system for virtual machine execution 2014-07-22
8719837 Microprocessor architecture having extendible logic Rich Fuhler 2014-05-06
8386972 Method and apparatus for managing the configuration and functionality of a semiconductor design Mohammed Noshad Khan, Edward Plowman 2013-02-26
8239620 Microprocessor with dual-level address translation 2012-08-07
7171631 Method and apparatus for jump control in a pipelined processor John Sanders 2007-01-30
6862563 Method and apparatus for managing the configuration and functionality of a semiconductor design Mohammed Noshad Khan, Edward Plowman 2005-03-01
6560754 Method and apparatus for jump control in a pipelined processor John Sanders 2003-05-06