Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Hiu Yung Wong — 12 Patents

SYSynopsys: 10 patents #94 of 2,302Top 5%
SLSpansion Llc.: 2 patents #309 of 769Top 45%
Cupertino, CA: #1,375 of 6,989 inventorsTop 20%
California: #51,404 of 386,348 inventorsTop 15%
Overall (All Time): #396,045 of 4,157,543Top 10%
12 Patents All Time
Hiu Yung Wong has been granted 12 US patents while listed as an inventor at Synopsys. The first was granted in 2009 and the most recent in May 2022. Hiu Yung Wong ranks #396,045 of 4,157,543 US inventors in our database (top 9.5%). Patent records list Hiu Yung Wong in Cupertino, CA, US.

Patents per Year

Patents granted per year, 2009 to 2022Bar chart with a peak of 5 patents in 2020.peak 52009: 1 patents20092011: 1 patents20112017: 1 patents20172018: 1 patents20182019: 1 patents20192020: 5 patents20202021: 1 patents20212022: 1 patents2022

Issued Patents All Time

Showing 1–12 of 12 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11348017 Machine learning method and framework for optimizing setups for accurate, speedy and robust TCAD simulations Nelson de Almeida Braga, Rimvydas Mickevicius 2022-05-31 $109,567,000
11152313 Using threading dislocations in GaN/Si systems to generate physically unclonable functions Rimvydas Mickevicius 2021-10-19 $146,375,000
10777638 Constricted junctionless FinFET/nanowire/nanosheet device having cascode portion Nelson de Almeida Braga, Rimvydas Mickevicius 2020-09-15 $28,550,000
10769339 Local band-to-band-tunneling model for TCAD simulation Rimvydas Mickevicius 2020-09-08 $60,580,000
10733348 Tined gate to control threshold voltage in a device formed of materials having piezoelectric properties Nelson de Almeida Braga, Rimvydas Mickevicius 2020-08-04 $54,280,000
10699914 On-chip heating and self-annealing in FinFETs with anti-punch-through implants Victor Moroz, Qiang Lu 2020-06-30 $159,980,000
10644107 Normally-off gallium oxide field-effect transistor Nelson de Almeida Braga, Rimvydas Mickevicius 2020-05-05 $63,764,000
10403625 Heterojunction field effect transistor device with serially connected enhancement mode and depletion mode gate regions Nelson de Almeida Braga, Rimvydas Mickevicius 2019-09-03
10128232 Heterojunction field effect transistor device with serially connected enhancement mode and depletion mode gate regions Nelson de Almeida Braga, Rimvydas Mickevicius 2018-11-13 $14,083,000
9837523 Tined gate to control threshold voltage in a device formed of materials having piezoelectric properties Nelson de Almeida Braga, Rimvydas Mickevicius 2017-12-05 $16,328,000
7880221 Forming metal-semiconductor films having different thicknesses within different regions of an electronic device Eunha Kim, Wen Yu, Minh Van Ngo, Kyunghoon Min 2011-02-01 $1,751,000
7482217 Forming metal-semiconductor films having different thicknesses within different regions of an electronic device Eunha Kim, Wen Yu, Minh Van Ngo, Kyunghoon Min 2009-01-27 $407,000