Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11861286 | Segregating defects based on computer-aided design (CAD) identifiers associated with the defects | Kiran U. Agashe | 2024-01-02 |
| 11763059 | Net-based wafer inspection | Rajesh Ramesh Sahani | 2023-09-19 |
| 11561256 | Correlation between emission spots utilizing CAD data in combination with emission microscope images | Rupa Sunil Kamoji | 2023-01-24 |
| 10990077 | Electronic virtual layer | — | 2021-04-27 |
| 10650509 | Video overlay | — | 2020-05-12 |
| 10295988 | Electronic virtual layer | — | 2019-05-21 |
| 9471745 | Chip cross-section identification and rendering analysis | Xi-Wei Lin | 2016-10-18 |
| 9454635 | Virtual layer generation during failure analysis | — | 2016-09-27 |
| 9430606 | Failure analysis and inline defect characterization | — | 2016-08-30 |
| 9147027 | Chip cross-section identification and rendering during failure analysis | Xi-Wei Lin | 2015-09-29 |
| 8826209 | Automated inline defect characterization | James Kramer | 2014-09-02 |
| 8775979 | Failure analysis using design rules | — | 2014-07-08 |
| 8255865 | Signal tracing through boards and chips | Scott Shen | 2012-08-28 |