Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11556676 | Scalable formal security verification of circuit designs | Naiyong Jin, Sudipta Kundu | 2023-01-17 |
| 10592624 | Efficient mechanism of fault qualification using formal verification | Sandeep Jana, Arunava Saha, Pratik Mahajan, Per M. Bjesse | 2020-03-17 |
| 8589836 | Formally checking equivalence using equivalence relationships | Carl Preston Pixley | 2013-11-19 |
| 8201119 | Formal equivalence checking between two models of a circuit design using checkpoints | — | 2012-06-12 |
| 8079000 | Method and apparatus for performing formal verification using data-flow graphs | Carl Preston Pixley | 2011-12-13 |
| 8001500 | Method and apparatus for formally checking equivalence using equivalence relationships | Carl Preston Pixley | 2011-08-16 |
| 7836414 | Formally proving the functional equivalence of pipelined designs containing memories | Jerry R. Burch, Carl Preston Pixley | 2010-11-16 |
| 7523423 | Method and apparatus for production of data-flow-graphs by symbolic simulation | Carl Preston Pixley | 2009-04-21 |
| 7509599 | Method and apparatus for performing formal verification using data-flow graphs | Carl Preston Pixley | 2009-03-24 |
| 7509604 | Method and apparatus for formally comparing stream-based designs | Carl Preston Pixley | 2009-03-24 |
| 7389479 | Formally proving the functional equivalence of pipelined designs containing memories | Jerry R. Burch, Carl Preston Pixley | 2008-06-17 |
| 7386820 | Method and apparatus for formally checking equivalence using equivalence relationships | Carl Preston Pixley | 2008-06-10 |
| 7260800 | Method and apparatus for initial state extraction | Carl Preston Pixley | 2007-08-21 |