| 9830174 |
Dynamic host code generation from architecture description for fast simulation |
Jacques Van Damme, Olaf Luthje |
2017-11-28 |
| 9317298 |
Generation of instruction set from architecture description |
Volker Greive |
2016-04-19 |
| 9064076 |
User interface for facilitation of high level generation of processor extensions |
Gunnar Braun, Frank Fiedler, Andreas Hoffmann, Gideon Intrater, Olaf Luthje +1 more |
2015-06-23 |
| 8706453 |
Techniques for processor/memory co-exploration at multiple abstraction levels |
Gunnar Braun, Olaf W. J. Zerres, Andreas Hoffmann |
2014-04-22 |
| 8595688 |
Generation of instruction set from architecture description |
Volker Greive |
2013-11-26 |
| 8554535 |
Instruction-set architecture simulation techniques using just in time compilation |
Gunnar Braun, Andreas Hoffmann, Oliver Schliebusch, Rainer Leupers, Heinrich Myer |
2013-10-08 |
| 8285535 |
Techniques for processor/memory co-exploration at multiple abstraction levels |
Gunnar Braun, Olaf Zorres, Andreas Hoffmann |
2012-10-09 |
| 8086438 |
Method and system for instruction-set architecture simulation using just in time compilation |
Gunnar Braun, Andreas Hoffmann, Oliver Schliebusch, Rainer Leupers, Heinrich Myer |
2011-12-27 |
| 7788078 |
Processor/memory co-exploration at multiple abstraction levels |
Gunnar Braun, Olaf Zorres, Andreas Hoffmann |
2010-08-31 |
| 7373638 |
Automatic generation of structure and control path using hardware description language |
Oliver Schliebusch, Andreas Hoffmann, Gunnar Braun, Heinrich Meyr |
2008-05-13 |
| 7313773 |
Method and device for simulator generation based on semantic to behavioral translation |
Gunnar Braun, Jianjiang Ceng, Andreas Hoffmann, Rainer Leupers |
2007-12-25 |