Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10248581 | Guarded memory access in a multi-thread safe system level modeling simulation | Jan M. J. Janssen, Thorsten H. Grötker, Christoph Schumacher | 2019-04-02 |
| 9817771 | Guarded memory access in a multi-thread safe system level modeling simulation | Jan M. J. Janssen, Thorsten H. Grötker, Christoph Schumacher | 2017-11-14 |
| 9280326 | Compiler retargeting based on instruction semantic models | Gunnar Braun, Andreas Hoffmann, Volker Greive, Jianjiang Ceng | 2016-03-08 |
| 9201708 | Direct memory interface access in a multi-thread safe system level modeling simulation | Jan M. J. Janssen, Thorsten H. Grötker, Christoph Schumacher, Dietmar Petras | 2015-12-01 |
| 9075666 | Deferred execution in a multi-thread safe system level modeling simulation | Jan M. J. Janssen, Thorsten H. Grötker, Christoph Schumacher | 2015-07-07 |
| 8689202 | Scheduling of instructions | Gunnar Braun, Andreas Hoffmann, Volker Grieve, Manuel Hohenauer | 2014-04-01 |
| 8554535 | Instruction-set architecture simulation techniques using just in time compilation | Achim Nohl, Gunnar Braun, Andreas Hoffmann, Oliver Schliebusch, Heinrich Myer | 2013-10-08 |
| 8086438 | Method and system for instruction-set architecture simulation using just in time compilation | Achim Nohl, Gunnar Braun, Andreas Hoffmann, Oliver Schliebusch, Heinrich Myer | 2011-12-27 |
| 7313773 | Method and device for simulator generation based on semantic to behavioral translation | Gunnar Braun, Achim Nohl, Jianjiang Ceng, Andreas Hoffmann | 2007-12-25 |