Issued Patents All Time
Showing 26–50 of 55 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7281117 | Processor executing SIMD instructions | Tetsuya Tanaka, Hazuki Okabayashi, Taketo Heishi, Hajime Ogawa, Tsuneyuki Suzuki +3 more | 2007-10-09 |
| 7259989 | Non-volatile memory device | Masayuki Toyama | 2007-08-21 |
| 7246202 | Cache controller, cache control method, and computer system | Hiroyuki Morishita | 2007-07-17 |
| 7240309 | Design check system, design check method and design check program | Yoshiyuki Saito | 2007-07-03 |
| 7228064 | Image decoding apparatus, recording medium which computer can read from, and program which computer can read | Yoshiyuki Wada, Makoto Hirai, Kosuke Yoshioka, Hideshi Nishida, Yukiharu Ieda | 2007-06-05 |
| 7185176 | Processor executing SIMD instructions | Tetsuya Tanaka, Hazuki Okabayashi, Taketo Heishi, Hajime Ogawa, Yoshihiro Koga +5 more | 2007-02-27 |
| 7167520 | Transcoder | Kosuke Yoshioka, Makoto Hirai, Tetsuji Mochida, Hiroyuki Oka, Hideshi Nishida | 2007-01-23 |
| 7079583 | Media processing apparatus which operates at high efficiency | Kosuke Yoshioka, Makoto Hirai, Kozo Kimura | 2006-07-18 |
| 7020787 | Microprocessor | Satoshi Takashima, Hideshi Nishida, Kozo Kimura | 2006-03-28 |
| 7007138 | Apparatus, method, and computer program for resource request arbitration | Tetsuji Mochida, Kosuke Yoshioka | 2006-02-28 |
| 6987811 | Image processor and image processing method | Takaharu Tanaka, Hideshi Nishida, Kosuke Yoshioka | 2006-01-17 |
| 6901454 | Circuit group control system | Nobuo Higaki, Tetsuya Tanaka, Kunihiko Hayashi, Hiroshi Kadota, Kozo Kimura +1 more | 2005-05-31 |
| 6829302 | Pixel calculating device | Hiroyuki Morishita, Kosuke Yoshioka, Hideshi Nishida, Makoto Hirai, Ryuji Matsuura +2 more | 2004-12-07 |
| 6809777 | Pixel calculating device | Hiroyuki Oka, Hideshi Nishida, Kosuke Yoshioka, Makoto Hirai, Kozo Kimura +3 more | 2004-10-26 |
| 6470376 | Processor capable of efficiently executing many asynchronous event tasks | Takaharu Tanaka, Kiyoshi Maenobu, Kosuke Yoshioka, Makoto Hirai | 2002-10-22 |
| 6462744 | IMAGE DECODING APPARATUS THAT PERFORMS IMAGE DECODING SO THAT FRAME AREAS THAT OCCUPY A LARGE AREA IN A STORAGE APPARATUS CAN BE USED FOR OTHER PURPOSES, AND A RECORDING MEDIUM RECORDING AN IMAGE DECODING PROGRAM | Tetsuji Mochida, Makoto Hirai, Hideshi Nishida | 2002-10-08 |
| 6414608 | Variable length code decoding device, digital broadcast receiving apparatus, and DVD reproducing apparatus | Hideshi Nishida, Kosuke Yoshioka | 2002-07-02 |
| 6340973 | Memory control unit and memory control method and medium containing program for realizing the same | Toshiyuki Ochiai, Yosuke Furukawa, Yutaka Tanaka, Kozo Kimura, Makoto Hirai +1 more | 2002-01-22 |
| 6310921 | Media processing apparatus which operates at high efficiency | Kosuke Yoshioka, Makoto Hirai, Kozo Kimura | 2001-10-30 |
| 6212236 | Image decoding apparatus | Hideshi Nishida, Kozo Kimura, Makoto Hirai | 2001-04-03 |
| 6105127 | Multithreaded processor for processing multiple instruction streams independently of each other by flexibly controlling throughput in each instruction stream | Kozo Kimura, Kousuke Yoshioka | 2000-08-15 |
| 6075899 | Image decoder and image memory overcoming various kinds of delaying factors caused by hardware specifications specific to image memory by improving storing system and reading-out system | Kosuke Yoshioka, Makoto Hirai, Kozo Kimura | 2000-06-13 |
| 5694577 | Memory conflict buffer for achieving memory disambiguation in compile-time code schedule | Wen-Mei Hwu, William Y. Chen | 1997-12-02 |
| 5535358 | Cache memory control circuit and method for controlling reading and writing requests | Kozo Kimura | 1996-07-09 |
| 5511172 | Speculative execution processor | Kozo Kimura, Kosuki Yoshioka | 1996-04-23 |