Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Pierre Bar — 26 Patents

SSStmicroelectronics Sa: 23 patents #183 of 4,662Top 4%
SSStmicroelectronics (Crolles 2) Sas: 9 patents #44 of 529Top 9%
CEA: 1 patents #3,381 of 7,956Top 45%
Grenoble, FR: #59 of 3,293 inventorsTop 2%
Overall (All Time): #150,017 of 4,157,543Top 4%
26 Patents All Time
Pierre Bar has been granted 26 US patents while listed as an inventor at Stmicroelectronics Sa. The first was granted in 2013 and the most recent in July 2025. Pierre Bar ranks #150,017 of 4,157,543 US inventors in our database (top 3.6%). Patent records list Pierre Bar in Grenoble, FR.

Issued Patents All Time

Showing 1–25 of 26 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12347670 Etching method Delia Ristoiu, Francois Leverd 2025-07-01
11469095 Etching method Delia Ristoiu, Francois Leverd 2022-10-11 $22,054,000
10770306 Method of etching a cavity in a stack of layers Francois Leverd, Delia Ristoiu 2020-09-08 $12,164,000
9818646 Process for fabricating an integrated circuit comprising at least one coplanar waveguide Sylvain Joblot 2017-11-14 $10,071,000
9780015 Integrated circuit chip assembled on an interposer Alisee Taluy, Olga Kokshagina 2017-10-03 $5,870,000
9673088 Process for fabricating an integrated circuit comprising at least one coplanar waveguide Sylvain Joblot 2017-06-06 $6,607,000
9646914 Process for producing a microfluidic circuit within a three-dimensional integrated structure, and corresponding structure Perceval Coudrain 2017-05-09 $7,299,000
9647625 Method for manufacturing BAW resonators on a semiconductor wafer David Petit, Sylvain Joblot, Jean-Francois Carpentier, Pierre Dautriche 2017-05-09 $7,299,000
9638589 Method for determining a three-dimensional stress field of an object, an integrated structure in particular, and corresponding system Vincent Fiori, Sebastien Gallois-Garreignot 2017-05-02 $4,791,000
9455191 Shielded coplanar line Sylvain Joblot 2016-09-27 $2,110,000
9418954 Integrated circuit chip assembled on an interposer Alisee Taluy, Olga Kokshagina 2016-08-16 $3,539,000
9385424 Three-dimensional integrated structure comprising an antenna Laurent Dussopt, Jean-Francois Carpentier 2016-07-05 $2,131,000
9324612 Shielded coplanar line Sylvain Joblot 2016-04-26 $1,360,000
9240624 Process for fabricating an integrated circuit comprising at least one coplanar waveguide Sylvain Joblot 2016-01-19 $2,212,000
9165861 Process for producing at least one through-silicon via with improved heat dissipation, and corresponding three-dimensional integrated structure Simon Gousseau, Yann Beilliard 2015-10-20 $3,089,000
9147725 Semiconductor device comprising an integrated capacitor and method of fabrication Sylvain Joblot 2015-09-29 $2,781,000
8994172 Connection of a chip provided with through vias Sylvain Joblot 2015-03-31 $2,314,000
8988893 Method for electrical connection between elements of a three-dimensional integrated structure and corresponding device Sylvain Joblot, Jean-Francois Carpentier 2015-03-24 $2,238,000
8975737 Transmission line for electronic circuits Sylvain Joblot, Jean-Francois Carpentier 2015-03-10 $2,865,000
8841748 Semiconductor device comprising a capacitor and an electrical connection via and fabrication method Sylvain Joblot, Alexis Farcy, Jean-Francois Carpentier 2014-09-23 $3,921,000
8841749 Semiconductor device comprising a capacitor and an electrical connection via, and fabrication method Sylvain Joblot, Alexy Farcy, Jean-Francois Carpentier 2014-09-23 $3,921,000
8756778 Method of adjustment during manufacture of a circuit having a capacitor Sylvain Joblot, David Petit 2014-06-24 $3,292,000
8704358 Method for forming an integrated circuit Sylvain Joblot, Nicolas Hotellier 2014-04-22 $3,560,000
8593234 Bragg mirror and BAW resonator with a high quality factor on the bragg mirror Sylvain Joblot, David Petit, Jean-Francois Carpentier 2013-11-26 $4,163,000
8587921 Method of adjustment on manufacturing of a circuit having a resonant element Sylvain Joblot, David Petit 2013-11-19 $2,926,000