Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12347670 | Etching method | Delia Ristoiu, Francois Leverd | 2025-07-01 |
| 11469095 | Etching method | Delia Ristoiu, Francois Leverd | 2022-10-11 |
| 10770306 | Method of etching a cavity in a stack of layers | Francois Leverd, Delia Ristoiu | 2020-09-08 |
| 9818646 | Process for fabricating an integrated circuit comprising at least one coplanar waveguide | Sylvain Joblot | 2017-11-14 |
| 9780015 | Integrated circuit chip assembled on an interposer | Alisee Taluy, Olga Kokshagina | 2017-10-03 |
| 9673088 | Process for fabricating an integrated circuit comprising at least one coplanar waveguide | Sylvain Joblot | 2017-06-06 |
| 9646914 | Process for producing a microfluidic circuit within a three-dimensional integrated structure, and corresponding structure | Perceval Coudrain | 2017-05-09 |
| 9647625 | Method for manufacturing BAW resonators on a semiconductor wafer | David Petit, Sylvain Joblot, Jean-Francois Carpentier, Pierre Dautriche | 2017-05-09 |
| 9638589 | Method for determining a three-dimensional stress field of an object, an integrated structure in particular, and corresponding system | Vincent Fiori, Sebastien Gallois-Garreignot | 2017-05-02 |
| 9455191 | Shielded coplanar line | Sylvain Joblot | 2016-09-27 |
| 9418954 | Integrated circuit chip assembled on an interposer | Alisee Taluy, Olga Kokshagina | 2016-08-16 |
| 9385424 | Three-dimensional integrated structure comprising an antenna | Laurent Dussopt, Jean-Francois Carpentier | 2016-07-05 |
| 9324612 | Shielded coplanar line | Sylvain Joblot | 2016-04-26 |
| 9240624 | Process for fabricating an integrated circuit comprising at least one coplanar waveguide | Sylvain Joblot | 2016-01-19 |
| 9165861 | Process for producing at least one through-silicon via with improved heat dissipation, and corresponding three-dimensional integrated structure | Simon Gousseau, Yann Beilliard | 2015-10-20 |
| 9147725 | Semiconductor device comprising an integrated capacitor and method of fabrication | Sylvain Joblot | 2015-09-29 |
| 8994172 | Connection of a chip provided with through vias | Sylvain Joblot | 2015-03-31 |
| 8988893 | Method for electrical connection between elements of a three-dimensional integrated structure and corresponding device | Sylvain Joblot, Jean-Francois Carpentier | 2015-03-24 |
| 8975737 | Transmission line for electronic circuits | Sylvain Joblot, Jean-Francois Carpentier | 2015-03-10 |
| 8841748 | Semiconductor device comprising a capacitor and an electrical connection via and fabrication method | Sylvain Joblot, Alexis Farcy, Jean-Francois Carpentier | 2014-09-23 |
| 8841749 | Semiconductor device comprising a capacitor and an electrical connection via, and fabrication method | Sylvain Joblot, Alexy Farcy, Jean-Francois Carpentier | 2014-09-23 |
| 8756778 | Method of adjustment during manufacture of a circuit having a capacitor | Sylvain Joblot, David Petit | 2014-06-24 |
| 8704358 | Method for forming an integrated circuit | Sylvain Joblot, Nicolas Hotellier | 2014-04-22 |
| 8593234 | Bragg mirror and BAW resonator with a high quality factor on the bragg mirror | Sylvain Joblot, David Petit, Jean-Francois Carpentier | 2013-11-26 |
| 8587921 | Method of adjustment on manufacturing of a circuit having a resonant element | Sylvain Joblot, David Petit | 2013-11-19 |