Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
PF

Philippe Flatresse — 8 Patents

SSStmicroelectronics Sa: 7 patents #910 of 4,662Top 20%
CEA: 2 patents #2,014 of 7,956Top 30%
SSStmicroelectronics (Crolles 2) Sas: 1 patents #308 of 529Top 60%
Apt, FR: #3 of 28 inventorsTop 15%
Overall (All Time): #600,572 of 4,157,543Top 15%
8 Patents All Time
Philippe Flatresse has been granted 8 US patents while listed as an inventor at Stmicroelectronics Sa. The first was granted in 2005 and the most recent in March 2018. Philippe Flatresse ranks #600,572 of 4,157,543 US inventors in our database (top 14.4%). Patent records list Philippe Flatresse in Apt, FR.

Issued Patents All Time

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9911737 Integrated circuit comprising transistors with different threshold voltages Bastien Giraud, Jean-Philippe Noel, Bertrand Pelloux-Prayer 2018-03-06 $12,366,000
9092590 Method for generating a topography of an FDSOI integrated circuit Bastien Giraud, Matthieu Le Boulaire, Jean-Philippe Noel 2015-07-28 $4,346,000
8570096 Transistor substrate dynamic biasing circuit Julien Le Coz, Alexandre Valentian, Sylvain Engels 2013-10-29 $2,795,000
8482070 Silicon-on-insulator CMOS integrated circuit with multiple threshold voltages and a method for designing the same Bastien Giraud, Jean-Philippe Noel, Matthieu Le Boulaire 2013-07-09 $6,869,000
7847623 Device and method for power switch monitoring Nicolas L'Hostis 2010-12-07 $8,419,000
7622983 Method and device for adapting the voltage of a MOS transistor bulk Olivier Thomas, Marc Belleville, Vincent Liot 2009-11-24 $4,765,000
7619863 Gated thyristor and related system and method Christophe Entringer, Pascal Salome, Florence Azais, Pascal Nouet 2009-11-17 $7,514,000
6871330 Method and device for characterizing a CMOS logic cell to be produced in a technology of the partially depleted silicon-on-insulator type Mario Casu 2005-03-22 $10,073,000