Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12362011 | SRAM with reconfigurable setting | Jean-Philippe Noel, Lorenzo Ciampolini | 2025-07-15 |
| 12119059 | Write method for differential resistive memories | Cyrille Laffond, Sebastien Nicolas Ricavy, Valentin Gherman, Ilan Sever | 2024-10-15 |
| 12046284 | Electroforming process using an inversion-invariant linear ECC, and associated device | Valentin Gherman, Samuel Evain | 2024-07-23 |
| 11043248 | Circuit for detection of predominant data in a memory cell | Jean-Philippe Noel, Reda Boumchedda, Emilien Bourde-Cice | 2021-06-22 |
| 10910040 | Memory circuit | Jean-Philippe Noel, Adam Makosiej | 2021-02-02 |
| 10811087 | Memory circuit capable of implementing calculation operations | Jean-Philippe Noel | 2020-10-20 |
| 10803927 | Partitioned memory circuit capable of implementing calculation operations | Jean-Philippe Noel, Avishek Biswas | 2020-10-13 |
| 10741565 | 3D SRAM circuit with double gate transistors with improved layout | Francois Andrieu, Remy BERTHELON | 2020-08-11 |
| 10559355 | Device and method for writing data to a resistive memory | Michel Harrand, Elisa VIANELLO, Olivier Thomas | 2020-02-11 |
| 10297319 | Memory device with unipolar resistive memory cells with programmable resistive element end control transistor and set/reset operations of thereof | Alexandre Levisse, Jean-Philippe Noel | 2019-05-21 |
| 9911737 | Integrated circuit comprising transistors with different threshold voltages | Philippe Flatresse, Jean-Philippe Noel, Bertrand Pelloux-Prayer | 2018-03-06 |
| 9542996 | Device with SRAM memory cells including means for polarizing wells of memory cell transistors | Olivier Thomas, Adam Makosiej | 2017-01-10 |
| 9508434 | Programmable-resistance non-volatile memory | Thomas Benoist, Haithem Ayari, Adam Makosiej, Yves Maneglia, Santhosh Onkaraiah +2 more | 2016-11-29 |
| 9479168 | Method for controlling an integrated circuit | Fady Abouzeid, Sylvain Clerc, Jean-Philippe Noel, Philippe Roche, Yvain Thonnart | 2016-10-25 |
| 9449688 | Device and method for writing data to a resistive memory | Olivier Thomas, Michel Harrand, Elisa VIANELLO | 2016-09-20 |
| 9136366 | Transistor with coupled gate and ground plane | Jean-Philippe Noel, Maud Vinet | 2015-09-15 |
| 9092590 | Method for generating a topography of an FDSOI integrated circuit | Philippe Flatresse, Matthieu Le Boulaire, Jean-Philippe Noel | 2015-07-28 |
| 9093499 | Integrated circuit using FDSOI technology, with well sharing and means for biasing oppositely doped ground planes present in a same well | Jean-Philippe Noel, Olivier Thomas | 2015-07-28 |
| 9000840 | Integrated circuit comprising a clock tree cell | Yvain Thonnart, Fady Abouzeid, Sylvain Clerc, Jean-Philippe Noel | 2015-04-07 |
| 8969967 | Self-contained integrated circuit including adjacent cells of different types | Jean-Philippe Noel, Olivier Thomas | 2015-03-03 |
| 8937505 | Integrated circuit comprising a clock tree cell | Fady Abouzeid, Sylvain Clerc, Jean-Philippe Noel, Yvain Thonnart | 2015-01-20 |
| 8482070 | Silicon-on-insulator CMOS integrated circuit with multiple threshold voltages and a method for designing the same | Philippe Flatresse, Jean-Philippe Noel, Matthieu Le Boulaire | 2013-07-09 |
| 8320198 | SRAM memory cell with double gate transistors provided means to improve the write margin | Olivier Thomas | 2012-11-27 |
| 7733688 | Asymmetrical SRAM cell with 4 double-gate transistors | Amara Amara | 2010-06-08 |