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USPTO Patent Rankings Data through Dec 31, 2025
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Lee A. Burton — 12 Patents

SCSrc Computers: 10 patents #2 of 20Top 10%
CCCray Computer: 1 patents #7 of 16Top 45%
Colorado Springs, CO: #257 of 2,971 inventorsTop 9%
Colorado: #3,808 of 40,980 inventorsTop 10%
Overall (All Time): #396,045 of 4,157,543Top 10%
12 Patents All Time
Lee A. Burton has been granted 12 US patents while listed as an inventor at Src Computers. The first was granted in 1995 and the most recent in August 2020. Lee A. Burton ranks #396,045 of 4,157,543 US inventors in our database (top 9.5%). Patent records list Lee A. Burton in Colorado Springs, CO, US.

Issued Patents All Time

Showing 1–12 of 12 patents

Patent #TitleCo-InventorsDate
10741226 Multi-processor computer architecture incorporating distributed multi-ported common memory modules Jon M. Huppenthal, Timothy J. Tewalt, David E. Caliga 2020-08-11
7680968 Switch/network adapter port incorporating shared memory resources selectively accessible by a direct execution logic element and one or more dense logic devices in a fully buffered dual in-line memory module format (FB-DIMM) 2010-03-16
7565461 Switch/network adapter port coupling a reconfigurable processing element to one or more microprocessors for use with interleaved memory controllers Jon M. Huppenthal, Thomas R. Seeman 2009-07-21
7424552 Switch/network adapter port incorporating shared memory resources selectively accessible by a direct execution logic element and one or more dense logic devices 2008-09-09
7421524 Switch/network adapter port for clustered computers employing a chain of multi-adaptive processors in a dual in-line memory module format Jon M. Huppenthal, Thomas R. Seeman 2008-09-02
7373440 Switch/network adapter port for clustered computers employing a chain of multi-adaptive processors in a dual in-line memory module format Jon M. Huppenthal, Thomas R. Seeman 2008-05-13
7197575 Switch/network adapter port coupling a reconfigurable processing element to one or more microprocessors for use with interleaved memory controllers Jon M. Huppenthal, Thomas R. Seeman 2007-03-27
7003593 Computer system architecture and memory controller for close-coupling within a hybrid processing system utilizing an adaptive processor interface port Jon M. Huppenthal, Thomas R. Seeman 2006-02-21
6996656 System and method for providing an arbitrated memory bus in a hybrid computing system 2006-02-07
6836823 Bandwidth enhancement for uncached devices 2004-12-28
6295598 Split directory-based cache coherency technique for a multi-processor computer system Jonathan L. Bertoni 2001-09-25
5455530 Duty cycle control circuit and associated method Jon M. Huppenthal 1995-10-03