Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
GS

Gian Sharma — 21 Patents

SMSpin Memory: 11 patents #17 of 49Top 35%
STSpin Transfer Technologies: 5 patents #3 of 25Top 15%
STSilicon Storage Technology: 3 patents #94 of 239Top 40%
NASA: 1 patents #1,837 of 3,881Top 50%
Fremont, CA: #779 of 9,298 inventorsTop 9%
California: #27,449 of 386,348 inventorsTop 8%
Overall (All Time): #201,324 of 4,157,543Top 5%
21 Patents All Time
Gian Sharma has been granted 21 US patents while listed as an inventor at Spin Memory. The first was granted in 1984 and the most recent in December 2020. Gian Sharma ranks #201,324 of 4,157,543 US inventors in our database (top 4.8%). Patent records list Gian Sharma in Fremont, CA, US.

Issued Patents All Time

Showing 1–21 of 21 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10854260 Adjustable current selectors Kuk-Hwan Kim, Amitay Levi 2020-12-01
10770510 Dual threshold voltage devices having a first transistor and a second transistor Amitay Levi, Kuk-Hwan Kim 2020-09-08
10770561 Methods of fabricating dual threshold voltage devices Amitay Levi, Kuk-Hwan Kim 2020-09-08
10614867 Patterning of high density small feature size pillar structures Amitay Levi 2020-04-07
10497415 Dual gate memory devices Kuk-Hwan Kim, Amitay Levi 2019-12-03
10460778 Perpendicular magnetic tunnel junction memory cells having shared source contacts Kuk-Hwan Kim, Dafna Beery, Marcin Gajek, Kadriye Deniz Bozdag, Girish Jagtiani +4 more 2019-10-29
10438999 Annular vertical Si etched channel MOS devices Amitay Levi, Andrew J. Walker, Kuk-Hwan Kim, Dafna Beery 2019-10-08
10355047 Fabrication methods of forming annular vertical SI etched channel MOS devices Amitay Levi, Andrew J. Walker, Kuk-Hwan Kim, Dafna Beery 2019-07-16
10347822 Fabrication methods of forming cylindrical vertical SI etched channel 3D switching devices Amitay Levi, Andrew J. Walker, Kuk-Hwan Kim, Dafna Beery 2019-07-09
10347311 Cylindrical vertical SI etched channel 3D switching devices Amitay Levi, Andrew J. Walker, Kuk-Hwan Kim, Dafna Beery 2019-07-09
10319424 Adjustable current selectors Kuk-Hwan Kim, Amitay Levi 2019-06-11
10192788 Methods of fabricating dual threshold voltage devices with stacked gates Amitay Levi, Kuk-Hwan Kim 2019-01-29
10192984 Dual threshold voltage devices with stacked gates Amitay Levi, Kuk-Hwan Kim 2019-01-29
10192787 Methods of fabricating contacts for cylindrical devices Amitay Levi, Kuk-Hwan Kim 2019-01-29
10192789 Methods of fabricating dual threshold voltage devices Amitay Levi, Kuk-Hwan Kim 2019-01-29
10186551 Buried tap for a vertical transistor used with a perpendicular magnetic tunnel junction (PMTJ) Kuk-Hwan Kim, Dafna Beery, Amitay Levi, Andrew J. Walker 2019-01-22
6969687 Method of planarizing a semiconductor die Amitay Levi 2005-11-29 $7,790,000
6756284 Method for forming a sublithographic opening in a semiconductor process 2004-06-29 $4,904,000
6703318 Method of planarizing a semiconductor die Amitay Levi 2004-03-09 $18,834,000
6699772 Hybrid trench isolation technology for high voltage isolation using thin field oxide in a semiconductor process 2004-03-02
4437961 Method for sequentially processing a multi-level interconnect circuit in a vacuum chamber Donald E. Routh 1984-03-20