FB

Francois Brunier

ST S.O.I. Tec Silicon On Insulator Technologies: 3 patents #49 of 155Top 35%
UL Université Catholique De Louvain: 1 patents #70 of 203Top 35%
Overall (All Time): #1,571,291 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
7790048 Treatment of the working layer of a multilayer structure Frédéric Allibert 2010-09-07
7601606 Method for reducing the trap density in a semiconductor wafer Vivien Renauld, Jean-Marc Waechter 2009-10-13
7585748 Process for manufacturing a multilayer structure made from semiconducting materials Jean-Pierre Raskin, Dimitri Lederer 2009-09-08