Issued Patents All Time
Showing 76–100 of 184 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11188237 | Anti-hacking mechanisms for flash memory device | Hieu Van Tran, Vipin Tiwari | 2021-11-30 |
| 11183506 | Method of making embedded memory device with silicon-on-insulator substrate | Jinho Kim, Xian Liu, Feng Zhou, Parviz Ghazavi, Steven Lemke | 2021-11-23 |
| 11158374 | Temperature compensation for memory cells in an analog neural memory system used in a deep learning neural network | Hieu Van Tran, Steven Lemke, Vipin Tiwari, Mark Reiten | 2021-10-26 |
| 11114451 | Method of forming a device with FinFET split gate non-volatile memory cells and FinFET logic devices | Feng Zhou, Xian Liu, Jinho Kim, Serguei Jourba, Catherine Decobert | 2021-09-07 |
| 11081553 | Method of forming split gate memory cells | Leo Xing, Chunming Wang, Guo Yong Liu, Melvin Diao, Xian Liu | 2021-08-03 |
| 11018147 | Method of forming split gate memory cells with thinned tunnel oxide | Jinho Kim, Elizabeth Cuevas, Parviz Ghazavi, Bernard Bertello, Gilles Festes +3 more | 2021-05-25 |
| 10998325 | Memory cell with floating gate, coupling gate and erase gate, and method of making same | Catherine Decobert, Hieu Van Tran | 2021-05-04 |
| 10956814 | Configurable analog neural memory system for deep learning neural network | Hieu Van Tran, Vipin Tiwari, Mark Reiten | 2021-03-23 |
| 10943661 | Current compensation block and method for programming analog neural memory in deep learning artificial neural network | Hieu Van Tran, Thuan Vu, Stanley Hong, Anh Ly, Vipin Tiwari | 2021-03-09 |
| 10937794 | Split gate non-volatile memory cells with FinFET structure and HKMG memory and logic gates, and method of making same | Feng Zhou, Jinho Kim, Xian Liu, Serguei Jourba, Catherine Decobert | 2021-03-02 |
| 10910061 | Method and apparatus for programming analog neural memory in a deep learning artificial neural network | Hieu Van Tran, Vipin Tiwari, Mark Reiten | 2021-02-02 |
| 10879252 | Non-volatile memory cells with floating gates in dedicated trenches | Leo Xing, Andy Liu, Xian Liu, Chunming Wang, Melvin Diao | 2020-12-29 |
| 10878897 | System and method for storing and retrieving multibit data in non-volatile memory using current multipliers | Vipin Tiwari, Hieu Van Tran | 2020-12-29 |
| 10861568 | Method and apparatus for data refresh for analog non-volatile memory in deep learning neural network | Hieu Van Tran, Vipin Tiwari | 2020-12-08 |
| 10839907 | Dynamic modification of programming duration based on number of cells to be programmed in analog neural memory array in deep learning artificial neural network | Hieu Van Tran, Thuan Vu, Stanley Hong, Anh Ly, Vipin Tiwari | 2020-11-17 |
| 10833178 | Method of making split gate non-volatile flash memory cell | Chunming Wang, Leo Xing, Andy Liu, Melvin Diao, Xian Liu | 2020-11-10 |
| 10833179 | Method of making split gate non-volatile flash memory cell | Chunming Wang, Leo Xing, Andy Liu, Melvin Diao, Xian Liu | 2020-11-10 |
| 10818680 | Split gate non-volatile memory cells and logic devices with FINFET structure, and method of making same | Feng Zhou, Jinho Kim, Xian Liu, Serguei Jourba, Catherine Decobert | 2020-10-27 |
| 10803943 | Neural network classifier using array of four-gate non-volatile memory cells | Hieu Van Tran, Steven Lemke, Vipin Tiwari, Mark Reiten | 2020-10-13 |
| 10797142 | FinFET-based split gate non-volatile flash memory with extended source line FinFET, and method of fabrication | Serguei Jourba, Catherine Decobert, Feng Zhou, Jinho Kim, Xian Liu | 2020-10-06 |
| 10790022 | Adaptive high voltage circuitry and methods for programming operations in an analog neural memory array in a deep learning artificial neural network | Hieu Van Tran, Thuan Vu, Stanley Hong, Anh Ly, Vipin Tiwari | 2020-09-29 |
| 10790292 | Method of making embedded memory device with silicon-on-insulator substrate | Jinho Kim, Xian Liu, Feng Zhou, Parviz Ghazavi, Steven Lemke | 2020-09-29 |
| 10755783 | Temperature and leakage compensation for memory cells in an analog neural memory system used in a deep learning neural network | Hieu Van Tran, Steven Lemke, Vipin Tiwari, Mark Reiten | 2020-08-25 |
| 10755779 | Architectures and layouts for an array of resistive random access memory cells and read and write methods thereof | Hieu Van Tran, Anh Ly, Thuan Vu, Stanley Hong, Feng Zhou +1 more | 2020-08-25 |
| 10748630 | High precision and highly efficient tuning mechanisms and algorithms for analog neuromorphic memory in artificial neural networks | Hieu Van Tran, Vipin Tiwari, Steven Lemke, Santosh Hariharan, Stanley Hong | 2020-08-18 |