Issued Patents All Time
Showing 51–75 of 80 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6201865 | Digital access arrangement circuitry and method for connecting to phone lines having a DC holding circuit with switchable time constants | Timothy J. Dupuis, George Tyson Tuttle, Jeffrey W. Scott, David R. Welland | 2001-03-13 |
| 6198816 | Capacitively coupled ring detector with power provided across isolation barrier | Jerrell P. Hein, Jeffrey W. Scott, David R. Welland | 2001-03-06 |
| 6191717 | Analog isolation system with digital communication across a capactive barrier | Jeffrey W. Scott, David R. Welland | 2001-02-20 |
| 6167132 | Analog successive approximation (SAR) analog-to-digital converter (ADC) | Andrew W. Krone, Jeffrey W. Scott, David R. Welland | 2000-12-26 |
| 6167134 | External resistor and method to minimize power dissipation in DC holding circuitry for a communication system | Jeffrey W. Scott, David R. Welland | 2000-12-26 |
| 6160885 | Caller ID circuit powered through hookswitch devices | Jeffrey W. Scott, David R. Welland | 2000-12-12 |
| 6144326 | Digital isolation system with ADC offset calibration | Andrew W. Krone, Timothy J. Dupuis, Jeffrey W. Scott, David R. Welland | 2000-11-07 |
| 6137827 | Isolation system with digital communication across a capacitive barrier | Jeffrey W. Scott, David R. Welland | 2000-10-24 |
| 6107948 | Analog isolation system with digital communication across a capacitive barrier | Jeffrey W. Scott, David R. Welland | 2000-08-22 |
| 6104794 | Architecture for minimum loop current during ringing and caller ID | Jerrell P. Hein, Andrew W. Krone, Jeffrey W. Scott, David R. Welland | 2000-08-15 |
| 6064326 | Analog-to-digital conversion overload detection and suppression | Andrew W. Krone | 2000-05-16 |
| 5870046 | Analog isolation system with digital communication across a capacitive barrier | Jeffrey W. Scott, David R. Welland | 1999-02-09 |
| 5818370 | Integrated CODEC with a self-calibrating ADC and DAC | Michael L. Duffy | 1998-10-06 |
| 5767722 | Delta sigma switch capacitor filter using curent feed forward | Dan B. Kasha | 1998-06-16 |
| 5579247 | Method and apparatus for decreasing the interference and noise sensitivity of a ratiometric converter type of circuit | Donald A. Kerth | 1996-11-26 |
| 5258758 | DAC shutdown for low power supply condition | — | 1993-11-02 |
| 5248970 | Offset calibration of a DAC using a calibrated ADC | Michael L. Duffy | 1993-09-28 |
| 5245344 | High order switched-capacitor filter with DAC input | — | 1993-09-14 |
| 5196850 | Fourth order digital delta-sigma modulator | Michael L. Duffy | 1993-03-23 |
| 5150386 | Clock multiplier/jitter attenuator | Kenneth J. Stern, Jerrell P. Hein | 1992-09-22 |
| 5087914 | DC calibration system for a digital-to-analog converter | Jeffrey W. Scott, Tadashi Tanaka | 1992-02-11 |
| 5079550 | Combining continuous time and discrete time signal processing in a delta-sigma modulator | Donald A. Kerth, Bruce P. Del Signore, Eric J. Swanson | 1992-01-07 |
| 5061925 | Phase equalization system for a digital-to-analog converter utilizing separate digital and analog sections | Donald A. Kerth, Eric J. Swanson, Tetsurou Sugimoto | 1991-10-29 |
| 4851841 | Gain scaling of oversampled analog-to-digital converters | — | 1989-07-25 |
| 4805198 | Clock multiplier/jitter attenuator | Kenneth J. Stern, Jerrell P. Hein | 1989-02-14 |