SC

Steve J. Ciavaglia

SG Silicon Graphics: 3 patents #134 of 758Top 20%
📍 Williston, VT: #84 of 203 inventorsTop 45%
🗺 Vermont: #1,707 of 4,968 inventorsTop 35%
Overall (All Time): #1,643,615 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
5632025 Method for preventing multi-level cache system deadlock in a multi-processor system Joseph P. Bratt, John Brennan, Peter Hsu, William A. Huffman, Joseph T. Scanlon 1997-05-20
5526504 Variable page size translation lookaside buffer Peter Hsu, Joseph T. Scanlon 1996-06-11
5510934 Memory system including local and global caches for storing floating point and integer data John Brennan, Peter Hsu, William A. Huffman, Paul Rodman, Joseph T. Scanlon +1 more 1996-04-23