Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417103 | Fusion with destructive instructions | Krste Asanovic | 2025-09-16 |
| 12367154 | Logging guest physical address for memory access faults | John Ingalls | 2025-07-22 |
| 12314191 | Memory protection for vector operations | Krste Asanovic | 2025-05-27 |
| 12253959 | Memory protection for gather-scatter operations | Krste Asanovic | 2025-03-18 |
| 12086067 | Load-store pipeline selection for vectors | Krste Asanovic | 2024-09-10 |
| 11861365 | Macro-op fusion | Krste Asanovic | 2024-01-02 |
| 11797308 | Fetch stage handling of indirect jumps in a processor pipeline | Joshua Aaron Smith, Krste Asanovic | 2023-10-24 |
| 11687342 | Way predictor and enable logic for instruction tightly-coupled memory and instruction cache | Krste Asanovic | 2023-06-27 |
| 11429392 | Secure predictors for speculative execution | Krste Asanovic | 2022-08-30 |
| 11301251 | Fetch stage handling of indirect jumps in a processor pipeline | Joshua Aaron Smith, Krste Asanovic | 2022-04-12 |
| 11048515 | Way predictor and enable logic for instruction tightly-coupled memory and instruction cache | Krste Asanovic | 2021-06-29 |
| 10996952 | Macro-op fusion | Krste Asanovic | 2021-05-04 |