Issued Patents All Time
Showing 101–125 of 153 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5812467 | Redundancy memory register | — | 1998-09-22 |
| 5805435 | Voltage booster for memory devices | — | 1998-09-08 |
| 5801988 | Circuit for the generation of a voltage as a function of the conductivity of an elementary cell of a non-volatile memory | — | 1998-09-01 |
| 5793699 | Circuit for the generation and reset of timing signal used for reading a memory device | — | 1998-08-11 |
| 5777941 | Column multiplexer | — | 1998-07-07 |
| 5768115 | Voltage booster with an acceleration circuit | Silvia Padoan, Carla Golla | 1998-06-16 |
| 5764570 | Current detecting circuit | — | 1998-06-09 |
| 5760497 | Charge pump circuit with multiple boost stages | — | 1998-06-02 |
| 5754483 | Reference word line and data propagation reproduction circuit for memories provided with hierarchical decoders | Paolo Rolandi, Marco Fontana, Antonio Barcella | 1998-05-19 |
| 5754473 | Circuit for the switching of supply voltages in electrically programmable and cancelable non-volatile semiconductor memory devices | — | 1998-05-19 |
| 5751654 | Driver device for selection lines for a multiplexer, to be used in a wide range of supply voltages, particularly for non-volatile memories | — | 1998-05-12 |
| 5742187 | Decoder with reduced architecture | — | 1998-04-21 |
| 5737268 | Modulated slope signal generation circuit, particularly for latch data sensing arrangements | — | 1998-04-07 |
| 5734610 | Circuit for reading non-volatile memories | — | 1998-03-31 |
| 5731716 | Programmable multibit register for coincidence and jump operations and coincidence fuse cell | — | 1998-03-24 |
| 5717642 | Load signal generating method and circuit for nonvolatile memories | Carla Golla | 1998-02-10 |
| 5708604 | Dynamic selection control in a memory | Marco Fontana | 1998-01-13 |
| 5708601 | Integrated circuitry for checking the utilization rate of redundancy memory elements in a semiconductor memory device | Vernon G. McKenny, Marco Maccarrone | 1998-01-13 |
| 5687124 | Circuit for identifying a memory cell having erroneous data stored therein | Carla Golla, Silvia Padoan | 1997-11-11 |
| 5663921 | Internal timing method and circuit for programmable memories | Marco Olivo, Carla Golla | 1997-09-02 |
| 5659498 | Unbalanced latch and fuse circuit including the same | Paolo Rolandi, Antonio Barcella, Marco Fontana | 1997-08-19 |
| 5657276 | Output stage for integrated circuits, particularly for electronic memories | — | 1997-08-12 |
| 5650671 | Charge pump circuit | Marco Maccarrone, Silvia Padoan | 1997-07-22 |
| 5644529 | Integrated circuit for the programming of a memory cell in a non-volatile memory register | Silvia Padoan | 1997-07-01 |
| 5633834 | Synchronization device for output stages, particularly for electronic memories | — | 1997-05-27 |