Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11214874 | Method and system for ion beam delayering of a sample and control thereof | Robert K. Foster, Christopher Pawlowicz, Ian Jones, Heinz Josef Nentwich | 2022-01-04 |
| 10689763 | Method and system for ion beam delayering of a sample and control thereof | Robert K. Foster, Christopher Pawlowicz, Ian Jones, Heinz Josef Nentwich | 2020-06-23 |
| 10550480 | Method and system for ion beam delayering of a sample and control thereof | Robert K. Foster, Christopher Pawlowicz, Ian Jones, Heinz Josef Nentwich | 2020-02-04 |
| 9534299 | Method and system for ion beam delayering of a sample and control thereof | Robert K. Foster, Christopher Pawlowicz, Ian Jones, Heinz Josef Nentwich | 2017-01-03 |
| 8219940 | Method and apparatus for removing dummy features from a data structure | Mohammed Ouali, Edward Keyes, Vyacheslav Zavadsky | 2012-07-10 |
| 7886258 | Method and apparatus for removing dummy features from a data structure | Mohammed Ouali, Edward Keyes, Vyacheslav Zavadsky | 2011-02-08 |
| 7873203 | Method of design analysis of existing integrated circuits | Vyacheslav Zavadsky, Val Gont, Edward Keyes, Stephen Begg | 2011-01-18 |
| 7765517 | Method and apparatus for removing dummy features from a data structure | Mohammed Ouali, Edward Keyes, Vyacheslav Zavadsky | 2010-07-27 |
| 7751643 | Method and apparatus for removing uneven brightness in an image | Vyacheslav Zavadsky | 2010-07-06 |
| 7693348 | Method of registering and aligning multiple images | Vyacheslav Zavadsky, Mark Braverman, Edward Keyes, Vladimir Martincevic | 2010-04-06 |
| 7643665 | Method of design analysis of existing integrated circuits | Vyacheslav Zavadsky, Val Gont, Edward Keyes, Stephen Begg | 2010-01-05 |
| 7580557 | Method of design analysis of existing integrated circuits | Vyacheslav Zavadsky, Val Gont, Edward Keyes, Stephen Begg | 2009-08-25 |
| 7207018 | Method and apparatus for locating short circuit faults in an integrated circuit layout | Vyacheslav Zavadsky, Elmehdi Aitnouri, Edward Keyes, Val Gont, Stephen Begg | 2007-04-17 |
| 7013028 | Advanced schematic editor | Val Gont, Larry Lam | 2006-03-14 |
| 6907583 | Computer aided method of circuit extraction | Thomas Kapler, Stephen Begg | 2005-06-14 |
| 6738957 | Schematic organization tool | Val Gont, Larry Lam, Alexei Ioudovski | 2004-05-18 |