SP

Subhash Srinivas Pidaparthi

ON onsemi: 11 patents #135 of 1,901Top 8%
NS Nexgen Power Systems: 9 patents #2 of 19Top 15%
Cypress Semiconductor: 1 patents #1,072 of 1,852Top 60%
Overall (All Time): #200,217 of 4,157,543Top 5%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12381159 Method and system for fabricating fiducials for processing of semiconductor devices David A. DeMuynck, Sharlene A. Wilson, Karthik Suresh Arulalan, Mark Curtice, Andrew P. Edwards +1 more 2025-08-05
12334352 Method and system for etch depth control in III-V semiconductor devices Wayne Chen, Andrew P. Edwards, Clifford Drowley 2025-06-17
12274086 Fabrication method for JFET with implant isolation Clifford Drowley, Andrew P. Edwards, Ray Milano 2025-04-08
12272654 Method and system for fabricating fiducials using selective area growth Clifford Drowley, Ray Milano, Robert Routh, Andrew P. Edwards 2025-04-08
12262557 Methods and systems to improve uniformity in power FET arrays Clifford Drowley, Andrew P. Edwards, Hao Cui 2025-03-25
12224344 Method and system for control of sidewall orientation in vertical gallium nitride field effect transistors Clifford Drowley, Andrew P. Edwards, Hao Cui, Michael D. Craven, David A. DeMuynck 2025-02-11
12155204 Method and system for fin-based voltage clamp Andrew J. Walker, Clifford Drowley, Andrew P. Edwards, Shahin Sharifzadeh, Joseph S. Tandingan 2024-11-26
12136645 Coupled guard rings for edge termination Clifford Drowley, Andrew P. Edwards, Hao Cui 2024-11-05
12125914 Method and system for fabrication of a vertical fin-based field effect transistor Clifford Drowley, Ray Milano, Andrew P. Edwards, Hao Cui, Shahin Sharifzadeh 2024-10-22
12113101 Method and system of junction termination extension in high voltage semiconductor devices Andrew P. Edwards, Clifford Drowley, Kedar Patel 2024-10-08
11996407 Self-aligned isolation for self-aligned contacts for vertical FETS Clifford Drowley, Hao Cui, Andrew P. Edwards 2024-05-28
11948801 Method and system for etch depth control in III-V semiconductor devices Wayne Chen, Andrew P. Edwards, Clifford Drowley 2024-04-02
11935838 Method and system for fabricating fiducials using selective area growth Clifford Drowley, Ray Milano, Robert Routh, Andrew P. Edwards 2024-03-19
11929440 Fabrication method for JFET with implant isolation Clifford Drowley, Andrew P. Edwards, Ray Milano 2024-03-12
11916134 Regrowth uniformity in GaN vertical devices Clifford Drowley, Ray Milano, Andrew P. Edwards 2024-02-27
11735671 Method and system for fabrication of a vertical fin-based field effect transistor Clifford Drowley, Ray Milano, Andrew P. Edwards, Hao Cui, Shahin Sharifzadeh 2023-08-22
11728415 Method for regrown source contacts for vertical gallium nitride based FETS Clifford Drowley, Andrew P. Edwards, Shahin Sharifzadeh 2023-08-15
11637209 JFET with implant isolation Clifford Drowley, Andrew P. Edwards, Ray Milano 2023-04-25
11335810 Method and system for fabrication of a vertical fin-based field effect transistor Clifford Drowley, Ray Milano, Andrew P. Edwards, Hao Cui, Shahin Sharifzadeh 2022-05-17
11315884 Method and system for fabricating fiducials using selective area growth Clifford Drowley, Ray Milano, Robert Routh, Andrew P. Edwards 2022-04-26
8154088 Semiconductor topography and method for reducing gate induced drain leakage (GIDL) in MOS transistors Antoine Khoueir, Henry Jim Fulford 2012-04-10